Studying the Machine Interrupt Registers
References ▼
Annotator: Miblo
0:06Recap and set the stage for the day
0:06Recap and set the stage for the day
0:06Recap and set the stage for the day
0:51Intuition on two's complement
0:51Intuition on two's complement
0:51Intuition on two's complement
4:10We are counting with zeroes
4:10We are counting with zeroes
4:10We are counting with zeroes
9:03Revisit instructions.scala and research register-transfer level
9:03Revisit instructions.scala and research register-transfer level
9:03Revisit instructions.scala and research register-transfer level
15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread
15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread
15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread
18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification
22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification
22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification
23:05Walk through clear_csr() again
23:05Walk through clear_csr() again
23:05Walk through clear_csr() again
28:53GNU Assembly Syntax: Constraints and Syntax
28:53GNU Assembly Syntax: Constraints and Syntax
28:53GNU Assembly Syntax: Constraints and Syntax
35:15Continue reading clear_csr()
35:15Continue reading clear_csr()
35:15Continue reading clear_csr()
40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses
40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses
40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses
44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
51:45A few words on the sponge mode that we're in
51:45A few words on the sponge mode that we're in
51:45A few words on the sponge mode that we're in
52:50Continue reading about the Machine Interrupt Registers
52:50Continue reading about the Machine Interrupt Registers
52:50Continue reading about the Machine Interrupt Registers
58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
1:06:48We're out of time for today
1:06:48We're out of time for today
1:06:48We're out of time for today