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<span class="episode_name">Studying the Machine Interrupt Registers</span>
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<span>References ▼</span>
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<a data-id="3" href="https://github.com/ucb-bar/rocket/blob/master/src/main/scala/instructions.scala" target="_blank" class="ref">
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<div class="source">GitHub</div>
<div class="ref_title">instructions.scala</div>
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<span data-timestamp="543" class="timecode"><span class="ref_index">[1]</span><span class="time">9:03</span></span>
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</a>
<a data-id="3" href="https://en.wikipedia.org/wiki/Register-transfer_level" target="_blank" class="ref">
<span class="ref_content">
<div class="source">Wikipedia</div>
<div class="ref_title">Register-transfer level</div>
</span>
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<span data-timestamp="543" class="timecode"><span class="ref_index">[2]</span><span class="time">9:03</span></span>
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<a data-id="4" href="https://forums.sifive.com/t/confusion-regarding-freedom-e-sdk-inline-asm/383" target="_blank" class="ref">
<span class="ref_content">
<div class="source">SiFive Forums</div>
<div class="ref_title">Confusion Regarding Freedom E SDK inline asm</div>
</span>
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<span data-timestamp="955" class="timecode"><span class="ref_index">[3]</span><span class="time">15:55</span></span>
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</a>
<a data-id="6" href="https://riscv.org/specifications" target="_blank" class="ref">
<span class="ref_content">
<div class="source">RISC-V</div>
<div class="ref_title">User-Level ISA Specification v2.1</div>
</span>
<div class="ref_indices">
<span data-timestamp="1344" class="timecode"><span class="ref_index">[4]</span><span class="time">22:24</span></span>
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<a data-id="8" href="http://ericw.ca/notes/a-tiny-guide-to-gcc-inline-assembly.html" target="_blank" class="ref">
<span class="ref_content">
<div class="source">ericw.</div>
<div class="ref_title">A Tiny Guide to GCC Inline Assembly</div>
</span>
<div class="ref_indices">
<span data-timestamp="1733" class="timecode"><span class="ref_index">[5]</span><span class="time">28:53</span></span>
</div>
</a>
<a data-id="10" href="https://riscv.org/specifications/privileged-isa/" target="_blank" class="ref">
<span class="ref_content">
<div class="source">RISC-V</div>
<div class="ref_title">Draft Privileged ISA Specification v1.9.1</div>
</span>
<div class="ref_indices">
<span data-timestamp="2421" class="timecode"><span class="ref_index">[6]</span><span class="time">40:21</span></span>
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<span class="annotator_container">Annotator: <span class="annotator">Miblo</span></span>
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<div class="content"><span class="timecode">0:06</span>Recap and set the stage for the day</div>
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<div class="content"><span class="timecode">0:06</span>Recap and set the stage for the day</div>
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<div class="progress main">
<div class="content"><span class="timecode">0:06</span>Recap and set the stage for the day</div>
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<div class="marker blackboard" data-timestamp="51">
<div class="content"><span class="timecode">0:51</span>Intuition on two's complement</div>
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<div class="content"><span class="timecode">0:51</span>Intuition on two's complement</div>
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<div class="content"><span class="timecode">0:51</span>Intuition on two's complement</div>
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<div class="marker blackboard" data-timestamp="250">
<div class="content"><span class="timecode">4:10</span>We are counting with zeroes</div>
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<div class="content"><span class="timecode">4:10</span>We are counting with zeroes</div>
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<div class="progress main">
<div class="content"><span class="timecode">4:10</span>We are counting with zeroes</div>
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<div class="marker" data-timestamp="543" data-ref="3">
<div class="content"><span class="timecode">9:03</span>Revisit instructions.scala<sup>1</sup> and research register-transfer level<sup>2</sup></div>
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<div class="content"><span class="timecode">9:03</span>Revisit instructions.scala<sup>1</sup> and research register-transfer level<sup>2</sup></div>
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<div class="progress main">
<div class="content"><span class="timecode">9:03</span>Revisit instructions.scala<sup>1</sup> and research register-transfer level<sup>2</sup></div>
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<div class="marker blackboard" data-timestamp="955" data-ref="4">
<div class="content"><span class="timecode">15:55</span>Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread<sup>3</sup></div>
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<div class="content"><span class="timecode">15:55</span>Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread<sup>3</sup></div>
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<div class="progress main">
<div class="content"><span class="timecode">15:55</span>Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread<sup>3</sup></div>
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<div class="marker blackboard" data-timestamp="1105">
<div class="content"><span class="timecode">18:25</span>Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints</div>
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<div class="content"><span class="timecode">18:25</span>Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints</div>
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<div class="progress main">
<div class="content"><span class="timecode">18:25</span>Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints</div>
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<div class="marker" data-timestamp="1344" data-ref="6">
<div class="content"><span class="timecode">22:24</span>Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification<sup>4</sup></div>
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<div class="content"><span class="timecode">22:24</span>Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification<sup>4</sup></div>
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<div class="content"><span class="timecode">22:24</span>Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification<sup>4</sup></div>
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<div class="marker" data-timestamp="1385">
<div class="content"><span class="timecode">23:05</span>Walk through clear_csr() again</div>
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<div class="content"><span class="timecode">23:05</span>Walk through clear_csr() again</div>
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<div class="content"><span class="timecode">23:05</span>Walk through clear_csr() again</div>
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<div class="marker blackboard" data-timestamp="1733" data-ref="8">
<div class="content"><span class="timecode">28:53</span>GNU Assembly Syntax: Constraints and Syntax<sup>5</sup></div>
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<div class="content"><span class="timecode">28:53</span>GNU Assembly Syntax: Constraints and Syntax<sup>5</sup></div>
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<div class="content"><span class="timecode">28:53</span>GNU Assembly Syntax: Constraints and Syntax<sup>5</sup></div>
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<div class="marker" data-timestamp="2115">
<div class="content"><span class="timecode">35:15</span>Continue reading clear_csr()</div>
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<div class="content"><span class="timecode">35:15</span>Continue reading clear_csr()</div>
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<div class="progress main">
<div class="content"><span class="timecode">35:15</span>Continue reading clear_csr()</div>
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<div class="marker" data-timestamp="2421" data-ref="10">
<div class="content"><span class="timecode">40:21</span>Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses<sup>6</sup></div>
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<div class="content"><span class="timecode">40:21</span>Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses<sup>6</sup></div>
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<div class="progress main">
<div class="content"><span class="timecode">40:21</span>Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses<sup>6</sup></div>
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</div>
<div class="marker" data-timestamp="2651">
<div class="content"><span class="timecode">44:11</span>Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register</div>
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<div class="content"><span class="timecode">44:11</span>Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register</div>
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<div class="progress main">
<div class="content"><span class="timecode">44:11</span>Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register</div>
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<div class="marker" data-timestamp="2966">
<div class="content"><span class="timecode">49:26</span>Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts</div>
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<div class="content"><span class="timecode">49:26</span>Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts</div>
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<div class="progress main">
<div class="content"><span class="timecode">49:26</span>Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts</div>
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<div class="marker" data-timestamp="3105">
<div class="content"><span class="timecode">51:45</span>A few words on the sponge mode that we're in</div>
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<div class="content"><span class="timecode">51:45</span>A few words on the sponge mode that we're in</div>
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<div class="content"><span class="timecode">51:45</span>A few words on the sponge mode that we're in</div>
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<div class="marker" data-timestamp="3170">
<div class="content"><span class="timecode">52:50</span>Continue reading about the Machine Interrupt Registers</div>
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<div class="content"><span class="timecode">52:50</span>Continue reading about the Machine Interrupt Registers</div>
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<div class="content"><span class="timecode">52:50</span>Continue reading about the Machine Interrupt Registers</div>
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<div class="marker" data-timestamp="3513">
<div class="content"><span class="timecode">58:33</span>Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation</div>
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<div class="content"><span class="timecode">58:33</span>Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation</div>
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<div class="progress main">
<div class="content"><span class="timecode">58:33</span>Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation</div>
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<div class="marker" data-timestamp="4008">
<div class="content"><span class="timecode">1:06:48</span>We're out of time for today</div>
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<div class="content"><span class="timecode">1:06:48</span>We're out of time for today</div>
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<div class="content"><span class="timecode">1:06:48</span>We're out of time for today</div>
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