[video member=miotatsu stream_platform=twitch project=book title="2.7" vod_platform=youtube id=cQxm-M6q84U annotator=Miblo]
[0:10][Recap and set the stage for the day][:speech]
[0:41][Correct memory from yesterday that [@pervognsen Per] actually used XOR in his carry-lookahead implementation][:speech]
[2:47][Confirm that we did read the correct Burks paper[ref
    site=YouTube
    page="Book Club (COAD)"
    url=https://www.youtube.com/playlist?list=PLExHkW81k6ebs6PqU3cJikn4cEC2gRIpX]]
[5:28][Chapter 2.7 Instructions for Making Decisions[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[10:42][A few words on flipping conditions when lowering code from a :language like C to assembly][:asm :speech]
[14:20][Structured control flow][:blackboard :language]
[19:20][Chapter 2.7 Example 1 - Compiling if-then-else into Conditional Branches[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4][ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/][ref
    site=GitLab
    page="hula / hello.S"
    url=https://gitlab.com/riscy-business/hula/raw/master/hello.S]][:asm :blackboard :language]
[40:45][Compare our answer to Chapter 2.7 Example 1 with the book[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :language]
[46:25][Consult the User-Level ISA Specification v2.2[ref
    site=RISC-V
    page="User-Level ISA Specification v2.2"
    url=https://riscv.org/specifications] to learn that the J instruction and the entire J-Type instruction format have been dropped][:isa]
[53:40][Continue to compare our answer to Chapter 2.7 Example 1, critiquing their use of BEQ rather than JAL[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[1:04:01][Refer to the GAS documentation for our label syntax[ref
    site="GNU Binutils"
    page="5.3 Symbol Names"
    url=https://sourceware.org/binutils/docs-2.28/as/Symbol-Names.html#Symbol-Names][ref
    site="RISCY BUSINESS Forums"
    page="Useful Links"
    url=https://riscy.handmade.network/forums/t/2190]][:asm]
[1:10:01][Figure 2.9 - Illustration of the options in the if statement above[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[1:13:14][Chapter 2.7 Hardware / Software Interface 1, on a supposed benefit of writing in high level languages[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[1:15:55][Chapter 2.7 continued, Loops[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[1:16:13][Chapter 2.7 Example 2 - Compiling a while Loop in C[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4][ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:asm :blackboard :language]
[1:47:40][Compare our answer to Chapter 2.7 Example 2 with the book[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :language]
[2:04:56][Chapter 2.7 Hardware / Software Interface 2, on basic blocks[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:05:32][Shout-out to [@Love2Code Maxime Chevalier][ref
    site="Pointers Gone Wild"
    url=https://pointersgonewild.com/] and her work on basic block versioning in just-in-time compilation][:language :speech]
[2:08:59][Chapter 2.7 Hardware / Software Interface 2 continued, on basic blocks[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:11:30][Chapter 2.7 continued, on equality testing[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:14:53][Chapter 2.7 continued, Bounds Check Shortcut[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:17:11][Chapter 2.7 Example 3 - Reducing an index-out-of-bounds check[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :blackboard :language]
[2:22:31][Compare our answer to Chapter 2.7 Example 3 with the book[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :language]
[2:23:14][Chapter 2.7 continued, Case / Switch Statement[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:27:22][Chapter 2.7 Hardware / Software Interface 3, on conditional branch[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[2:27:46][Chapter 2.7 Check Yourself 1 - "C has many statements for decisions and loops, while RISC-V has few. Which of the following does or does not explain this imbalance? Why?"[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa :language]
[2:33:50][Chapter 2.7 Check Yourself 2 - "Why does C provide two sets of operators for AND (& and &&) and two sets of operators for OR (| and ||), while RISC-V doesn't?"[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa :language]
[2:41:21][Chapter 2.7 Check Yourself Answers[ref
    title="Computer Organization and Design RISC-V Edition"
    author="David Patterson & John Hennessy"
    publisher="Morgan Kaufmann"
    isbn=9780128122754
    url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa :language]
[2:54:50][That's the end of the chapter][:speech]
[/video]
