From 0707289878347f35ef2f97ab7373af32494dd7d0 Mon Sep 17 00:00:00 2001 From: Matt Mascarenhas Date: Wed, 17 Jan 2018 22:10:37 +0000 Subject: [PATCH] Annotate riscy/book/reader003 --- miotatsu/riscy/book/reader003.hmml | 119 +++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) create mode 100644 miotatsu/riscy/book/reader003.hmml diff --git a/miotatsu/riscy/book/reader003.hmml b/miotatsu/riscy/book/reader003.hmml new file mode 100644 index 0000000..35c6306 --- /dev/null +++ b/miotatsu/riscy/book/reader003.hmml @@ -0,0 +1,119 @@ +[video member=miotatsu stream_platform=twitch project=book title="2.1-2.3" vod_platform=youtube id=Tfv34rzvftM annotator=Miblo] +[0:01][Welcome to the stream][:speech] +[0:31][Chapter 2 - RV32I: RISC-V Base Integer :ISA[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]] +[1:29][Chapter 2.1 - Introduction[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[2:30][Map the tablet][:admin] +[3:02][The set notation used in the book to describe the :ISA][:blackboard] +[7:24][Chapter 2.1 continued[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[7:38][Chapter 2.2 - RV32I Instruction Formats[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[11:31][Figure 2.1 - Diagram of the RV32I instructions[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[18:06][Diagram of the RV32I instructions][:blackboard :isa] +[30:54][Figure 2.2 - RISC-V instruction formats[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[34:10][Add B-type to our RISC-V instruction formats diagram][:blackboard :isa] +[37:43][Explain the RISC-V instruction formats diagram][:blackboard :isa] +[40:09][Add J-type to our RISC-V instruction formats diagram][:blackboard :isa] +[42:25][Explain immediates and their encoding][:isa :speech] +[43:21][Figure 2.3 - RV32I opcode map[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[45:43][Search the annotated episode guide for "instruction encoding"[ref + site="RISCY BUSINESS" + page="Annotated Episode Guide" + url=http://cinera.riscy.tv#instruction%20encoding]][:isa] +[48:25][Figure 2.3 continued, with thoughts on funct3[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[49:41][@snail7777777][Hey, bud] +[49:44][Continued thoughts on funct3[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[51:03][Chapter 2.2 continued, Elaboration: B- and J-type formats[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[52:47][Chapter 2.2 continued, Aside: Sign-extended immediates even help logical instructions[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[54:03][Chapter 2.2 continued, illegal instructions and leaving room for extensions[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[56:46][Thoughts on the carefully arranged immediates][:isa :speech] +[58:48][Chapter 2.2 continued, enabling :hardware simplicity[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[1:00:11][Chapter 2.2 continued, Aside: RISC-V implementations all use the same opcode for the optional extensions[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[1:00:39][Chapter 2.2 continued, the ARM-32 12-bit immediate field[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[1:02:41][Chapter 2.2 continued, Elaboration: Out-of-order processors[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[1:03:39][Chapter 2.3 - RV32I Registers[ref + title="RISC-V Reader" + author="David Patterson and Andrew Waterman" + publisher="Strawberry Canyon" + isbn=9780999249116 + url=http://www.riscvbook.com/]][:isa] +[1:06:10][Wrap it up with the determination continue this another day][:speech] +[/video]