From 146f102e547a3f0e7a6ed6ed421d37851c803f05 Mon Sep 17 00:00:00 2001 From: Matt Mascarenhas Date: Fri, 11 May 2018 19:37:38 +0100 Subject: [PATCH] Annotate bitwise025 bitwise024_1: Tweak an annotation --- pervognsen/bitwise/bitwise/bitwise024_1.hmml | 2 +- pervognsen/bitwise/bitwise/bitwise025.hmml | 52 +++++++++++++++++++- 2 files changed, 52 insertions(+), 2 deletions(-) diff --git a/pervognsen/bitwise/bitwise/bitwise024_1.hmml b/pervognsen/bitwise/bitwise/bitwise024_1.hmml index f85b152..3cb8795 100644 --- a/pervognsen/bitwise/bitwise/bitwise024_1.hmml +++ b/pervognsen/bitwise/bitwise/bitwise024_1.hmml @@ -63,7 +63,7 @@ [2:02:09][Step in to emit_lw() and spot that the addr was at the max capacity of our RAM] [2:02:50][Add more RAM][:asm :memory] [2:03:18][:Run it to see that this totally works][:asm] -[2:04:10][Add an assertion in check_overflow()][:memory] +[2:04:10][Make check_overflow() assert on a bounds-checking failure][:memory] [2:04:18][:Run it with a smaller amount of RAM, and hit that assertion][:asm :memory] [2:04:39][Cut over to the extra stream][:speech] [/video] diff --git a/pervognsen/bitwise/bitwise/bitwise025.hmml b/pervognsen/bitwise/bitwise/bitwise025.hmml index 412578f..4f76efe 100644 --- a/pervognsen/bitwise/bitwise/bitwise025.hmml +++ b/pervognsen/bitwise/bitwise/bitwise025.hmml @@ -1,3 +1,53 @@ [video member=pervognsen stream_platform=twitch project=bitwise title="RISC-V Dynamic Assembler, Part 2" vod_platform=youtube id=ISNB7ARzUiE annotator=Miblo] -[0:00][\[Annotations to be written…\]] +[0:07][Recap and set the stage for the day][:speech] +[1:03][Review the current functionality of our dynamic assembler][:asm :research] +[8:05][Explain symbol allocation and back-patching][:asm :memory :research] +[18:39][Review bug fix in S-immediate encoding, and the introduction of asm_la() asm_branch() and asm_j()[ref + author="Andrew Waterman and Krste Asanović" + title="The RISC-V Instruction Set Manual - Volume 1: User-Level ISA" + url=https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf]][:asm :research] +[22:38][Q&A][:speech] +[22:49][@xanatos387][Hum is coming and going, when you move your head around, I think] +[23:43][Determine to implement basic memory-mapped I/O][:emulation :peripheral :speech] +[24:54][Memory-mapped I/O in emulators][:emulation :peripheral :speech] +[28:19][Abstract out the RAM handling from Hart into a new Bus struct, and propagate this change][:asm :memory] +[36:08][:Run it to see that it still works][:asm :memory] +[36:27][Implement memory-mapped I/O, hard-coded for now, enabling bus_load_word() and bus_store_word() to call getchar() and putchar() respectively][:asm :peripheral] +[40:36][Try to perform a asm_lw_imm(asm, X5, GETCHAR_ADDR)][:asm :peripheral] +[41:11][:Run it to see what it does][:asm :peripheral] +[41:46][Remove the get_char() from main() and introduce pseudo-instructions asm_get_char() and asm_put_char() to exercise our memory-mapped I/O][:asm :"input handling" :peripheral] +[44:18][Add asm_getchar() and asm_putchar() calls in main()][:asm :"input handling" :peripheral] +[44:45][:Run the simulator to see its infinite output][:asm :"input handling" :peripheral] +[45:02][Call get_char() in the main loop][:asm :"input handling" :peripheral] +[45:08][:Run it, press 'x' and see X5 get populated with 120][:asm :"input handling" :peripheral] +[45:33][Remove both getchar() and print_hart_state() from the main loop, and add a repeat label and asm_j() to our assembly][:asm :"input handling" :peripheral] +[46:37][:Run it to try our echo-loop][:asm :"input handling" :peripheral] +[46:48][A few words on our memory-mapped I/O, with a mention of mame[ref + site=GitHub + page="mamedev / mame" + url=https://github.com/mamedev/mame] and the Sega X Board[ref + site="Sega Retro" + page="Sega X Board" + url=https://segaretro.org/Sega_X_Board]][:asm :"input handling" :peripheral :speech] +[54:46][Consider moving on to doing an RPN (Reverse Polish notation) to RISC-V code generator][:asm :"code generation" :speech] +[56:46][RPN to RISC-V :"code generation"][:asm :speech] +[58:06][Introduce gen_rpn() (and necessary functions) as an RPN to RISC-V code generator][:asm :"code generation"] +[1:18:30][Try out our gen_rpn()][:asm :"code generation"] +[1:20:11][Step through gen_rpn() to see what it does][:asm :"code generation" :run] +[1:22:25][Print out the registers in the main loop][:asm] +[1:22:31][:Run it to follow what gen_rpn() does][:asm :"code generation"] +[1:24:47][Enable gen_rpn() to push the correct decimal values of our ASCII characters][:asm :"code generation"] +[1:27:21][:Run it to see that it pushes the correct values][:asm :"code generation"] +[1:27:44][Try to make gen_rpn() generate the code for a +2][:asm :"code generation"] +[1:28:01][:Run it to see that it computes it correctly, but prints out an extra character][:asm :"code generation"] +[1:29:09][Make bus_load_word() eat '\\n'][:asm :"code generation"] +[1:30:00][:Run it to see that it looks good][:asm :"code generation"] +[1:30:26][Make gen_rpn() insert '\\n' after each digit][:asm :"code generation"] +[1:31:12][:Run it to see that nicer printout][:asm :"code generation"] +[1:31:16][Introduce a duplication character in gen_rpn()][:asm :"code generation"] +[1:31:59][:Run it to see how that works][:asm :"code generation"] +[1:32:13][Reflect on our RPN to RISC-V generator][:asm :"code generation" :speech] +[1:32:57][Try to make gen_rpn() calculate the digit-wise complement][:asm :"code generation"] +[1:33:22][:Run it to see that it works][:asm :"code generation"] +[1:33:32][That's it for today, and likely also next week to write articles][:speech] [/video]