Annotation-Pushers
/
cinera_handmade.network
1
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

riscy/book: Farewell, old friend

This commit is contained in:
Matt Mascarenhas 2018-08-18 19:05:40 +01:00
parent 0287eb67c7
commit 240afd6fe6
21 changed files with 0 additions and 2639 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

101
miotatsu/riscy/book/coad001.hmml
View File

@ -1,101 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.1" vod_platform=youtube id=HJahhiSIoZ8 annotator=Miblo]
[0:01][Welcome to the first episode of the Book Club[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[1:55][Preface to the series]
[4:08][Chapter 1: Computer Abstractions and Technology[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[8:28][Note that we have self-driving cars these days, as an application of deep learning][:ai]
[10:31][Chapter 1 (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[14:35][Traditional classes of computing applications and their characteristics[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[18:39][Measurement terminology[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[21:12][Recommend Code by Charles Petzold[ref
title="Code: The Hidden Language of Computer Hardware and Software"
author="Charles Petzold"
publisher="Microsoft Press"
isbn=0-7356-0505-X
url=http://www.charlespetzold.com/code/]]
[22:41][Embedded Applications[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[28:47][Praise RISC-V for diving down and building stuff from the ground up, rather than rushing a product out]
[29:38][Primary constraint on computer performance in the 1960s and '70s[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[33:12][The questions this book will answer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[36:44][Understanding program performance: How the hardware and software affect performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[38:43][A few words on programming language compiler and architecture, with a recommendation of the lcc book[ref
title="lcc, A Retargetable Compiler for ANSI C"
author="Chris Fraser and David Hanson"
publisher="Addison-Wesley"
isbn=9780805316704
url=https://sites.google.com/site/lccretargetablecompiler/]]
[39:56][Demonstrating the impact of the ideas in the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[41:16][Check yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[41:38][Encourage discussion in the twitch chat, YouTube comments, RISCY BUSINESS forums[ref
site="Handmade Network"
page="RISCY BUSINESS Forums"
url=https://riscy.handmade.network/forums] and SiFive Forums[ref
site="SiFive Forums"
url=https://forums.sifive.com/]]
[42:23][Check yourself (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[44:27][A few words on performance :optimisation]
[47:12][On doing C-style programming in D, and controlling translation units][:language :optimisation]
[53:38][On using SIMD to get speedups at the processor level][:optimisation]
[56:50][Consider where I/O devices are a bottleneck, with advice to buy an SSD]
[1:00:05][Consider where the operating system is a bottleneck]
[1:01:24][We are out of time for today]
[/video]

122
miotatsu/riscy/book/coad002.hmml
View File

@ -1,122 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.2 & 1.3" vod_platform=youtube id=Y9cRAecLf_M annotator=Miblo]
[0:07][Recap and set the stage for the day, with ~milton open]
[1:11][Chapter 1.2 - Eight Great Ideas in Computer Architecture[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:10][An example of the icons in the margins of the book]
[3:55][Great Idea 1: A Design for Moore's Law[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[5:01][A few notes on the datedness of that section]
[7:48][Great Idea 2: Use Abstractions to Simplify Design[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[8:39][Commentary on abstraction in software, and [@cmuratori Casey]'s compression-oriented programming][:rant]
[13:30][Great Idea 3: Make the Common Case Fast[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:optimisation :research]
[16:27][Great Idea 4: Performance via Parallelism[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:optimisation :research]
[17:03][Great Idea 5: Performance via Pipe-lining[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:optimisation :research]
[17:58][A few words on the old bucket brigade, and the Little Rascals movie[ref
site=IMDb
page="The Little Rascals"
url=http://www.imdb.com/title/tt0110366/]]
[18:52][Great Idea 6: Performance via Prediction[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[19:27][Great Idea 7: Hierarchy of Memories[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:memory :research]
[20:50][A few notes on the relevance of the cache][:hardware]
[24:33][Great Idea 8: Dependability via Redundancy[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[26:10][Chapter 1.3 - Blow Your Program[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[29:27][A :rant on languages providing features that cater to abstraction][:language]
[32:05][Glimpse into the future of creating our own small, minimal :language that is directly related to the assembly of RISC-V][:asm]
[33:14][Plug Krste Asanovic's tweet on the arrival of RISC-V support in GCC[ref
author="Krste Asanovic"
site=Twitter
page="GCC 7.1 with RISC-V support released!"
url=https://twitter.com/kasanovic/status/859492869953990658]][:language]
[34:08][From a high-level :language to the language of :hardware[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[37:14][Exercise for the viewer: Look up the encoding for the add instruction in the RISC-V spec, to see if it agrees with the book][:research]
[38:54][Instruction Encoding][:blackboard]
[39:23][Assembly :language and machine code[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[40:10][A few words on the programmer needing to think like the computer][:language]
[42:48][:Language abstractions, and an example swap function in [:asm assembly][ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[50:17][A few words on gcc's ability to output assembly]
[50:40][Continuing about [:asm assembly][ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[51:26][A few words on FORTRAN, COBOL and lisp still being used by businesses][:language]
[52:48][Improved programmer productivity[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[53:12][A few words of praise for D for prototyping][:language]
[55:49][Platform independence[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language :research]
[56:16][On the truth of this to a certain extent, while languages themselves being cross-platform are doomed to failure][:rant]
[59:28][A good time to stop]
[/video]

128
miotatsu/riscy/book/coad003.hmml
View File

@ -1,128 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.4" vod_platform=youtube id=s3Xps78Qhms annotator=Miblo]
[0:07][Set the stage for reading section 1.4]
[0:34][Chapter 1.4 - Under the Covers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[3:09][Figure 1.5 - The standard organisation of a computer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[9:33][Through the looking glass[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[9:53][A few words on the underappreciated importance of graphical displays][:peripheral]
[11:44][Through the looking glass (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:peripheral :research]
[14:19][A few words on [@miotatsu Mio]'s own monitor setup][:trivia]
[15:31][Through the looking glass (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:peripheral :research]
[16:06][Figure 1.6 - Framebuffer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:rendering]
[19:20][Touch screen[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:peripheral :research]
[20:28][Opening the box[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :peripheral :research]
[24:02][@noblethylacine][What is this book?]
[24:54][A few words on latencies being magnified when making RAM in Minecraft][:memory]
[25:50][Opening the box (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :peripheral :research]
[32:12][Figure 1.8 - The logic board of Apple iPad 2[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :peripheral :research]
[34:06][A suggestion to buy lower spec systems with a view to upgrading them]
[35:29][Figure 1.9 - Processor Integrated Circuit[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :peripheral :research]
[40:04][Cache :memory[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[42:13][A few words on the amount of time we spend studying instruction set documentation in ~riscy]
[45:28][Hunt for a reference in the ~hero site]
[47:07][Plug the ability of ~insobot to pull stream schedules from twitter[ref
site="insobot stream schedule"
url=https://abaines.me.uk/insobot/schedule]]
[48:49][Compare the size of the Intel 64 and IA-32 Architectures Software Developer's Manual[ref
site=Intel
page="Intel 64 and IA-32 Architectures Software Developer's Manual"
url=https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf] with the RISC-V architecture]
[54:24][Instruction set architecture[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[55:48][The hierarchy of HiFive1 documentation: E3 Coreplex[ref
site="SiFive Developers"
page="E3 Coreplex Manual"
url=https://static.dev.sifive.com/pdfjs/web/viewer.html?file=https://static.dev.sifive.com/SiFive-E3-Coreplex-v1.2.pdf] → E300[ref
site="SiFive Developers"
page="Freedom E300 Platform Reference Manual"
url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/] → FE310-G000[ref
site="SiFive Developers"
page="Freedom E310-G000 Manual"
url=https://www.sifive.com/documentation/chips/freedom-e310-g000-manual/]]
[58:15][A safe place for data[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:memory :research]
[1:00:51][Note that SSD is flash-based storage and does wear out]
[1:02:04][Communicating with other computers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:networking :research]
[1:05:03][A few words on physically mailing magnetic tapes and the ping time between Mars and Earth that Elon Musk may need to consider in his endeavours to establish a colony on Mars]
[1:07:05][Communicating with other computers (cont.)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:networking :research]
[1:09:43][Check yourself: Compare the volatility, access time and cost of semiconductor, DRAM and flash :memory and disk storage]
[1:10:46][Spare us the "check yourself" and reflect on chapter 1.4]
[1:12:30][That will be it for tonight]
[/video]

218
miotatsu/riscy/book/coad004.hmml
View File

@ -1,218 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.5 & 1.6" vod_platform=youtube id=p_XelOwyhUQ annotator=Miblo]
[0:22][Recap with the determination to do the "check yourself" exercise from Chapter 1.4]
[1:24][Check yourself: Compare the volatility, access time and cost of semiconductor, DRAM and flash :memory and disk storage]
[4:22][Chapter 1.5: Technologies for building processors and :memory[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[5:09][Figure 1.10: Relative performance-per-unit cost of technologies used in computers over time[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[7:58][Chapter 1.5, continued: Integrated circuits and transistors[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[10:36][Figure 1.11: Growth of capacity per DRAM chip over time[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :memory :research]
[11:57][The three devices that we're able to create out of the semiconductor silicon[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :hardware :research]
[13:37][Recommend "Indistinguishable From Magic: Manufacturing Modern Computer Chips" video[ref
site=YouTube
page="Indistinguishable From Magic: Manufacturing Modern Computer Chips"
url=https://www.youtube.com/watch?v=NGFhc8R_uO4]][:fabrication]
[16:00][Processing a silicon crystal ingot[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[18:06][Figure 1.12: The chip manufacturing process[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[20:48][Figure 1.13: Photograph of a wafer containing microprocessors before they have been diced[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[23:23][Reducing the cost of fabricating an integrated circuit[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[25:47][Chip manufacturing costs][:blackboard :fabrication]
[27:58][Deriving the cost equations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[29:11][Check yourself: Why should a chip made in high volume cost less?[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:fabrication :research]
[42:50][Chapter 1.6: :Performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[44:32][Figure 1.14: Typical passenger airplanes[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[51:36][Defining and prioritising :performance concerns[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:00:49][Response time :performance][:blackboard]
[1:04:18][Relative :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:04:40][Comparing :performance][:blackboard]
[1:07:12][Explaining comparisons of, and measuring :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:12:54][A few words on optimising for user time][:optimisation :performance]
[1:16:21][Understanding program :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:18:53][Check yourself: Which :performance metrics are improved for a networked application?][:networking]
[1:24:08][Check yourself: Compare the :performance of one system which is four times faster than another]
[1:27:32][CPU :performance and its factors[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:28:53][Time measurements][:blackboard :performance]
[1:31:21][Improving :performance by reducing clock cycles[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:32:40][Targeting clock rate][:blackboard :performance]
[1:38:37][Computing the target clock rate[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:45:20][Calculating 20 × 12][:blackboard]
[1:46:47][Instruction :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:47:06][@snailcannon][Hello, dude]
[1:47:31][Instruction :performance, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:48:25][CPU clock cycles][:blackboard :performance]
[1:49:44][Clock cycles per instruction (CPI)[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:51:23][Which of two computers is faster for a given program?][:blackboard :performance]
[1:56:36][Comparing the speed of two computers with different clock cycle time and CPI[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:59:15][The classic CPU :performance equation[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:00:07][CPU time][:blackboard :performance]
[2:01:15][Comparing code sequences[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:05:00][Our clock cycles computations][:blackboard :performance]
[2:06:27][The computations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:09:12][Our CPI computations][:blackboard :performance]
[2:10:34][Their CPI computations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:11:16][Figure 1.15: The basic components of :performance and how each is measured[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:13:08][Time][:blackboard :performance]
[2:14:52][Determining the value of :performance factors[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:profiling :research]
[2:17:36][Understanding program :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:21:35][Check yourself: Compare the :performance of two given compilers][:blackboard]
[2:38:51][Check our answers for the chapter[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:39:09][Put that one to rest with a glimpse at the remaining sections of Chapter 1]
[/video]

135
miotatsu/riscy/book/coad005.hmml
View File

@ -1,135 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.7 & 1.8" vod_platform=youtube id=J4grCXyJxp4 annotator=Miblo]
[0:09][Recap last time's reading on :performance measurements]
[0:38][@riskyfive][o/]
[0:43][A few words on benchmarking and rigorously choosing a sample size[ref
site=Wikipedia
page="Checking whether a coin is fair"
url=https://en.wikipedia.org/wiki/Checking_whether_a_coin_is_fair]][:performance]
[3:40][@riskyfive][Learning statistics from Wikipedia is hard. The definitions are kind of circular. They are easy to understand after you learn stats somewhere else]
[3:58][Estimator of true probability[ref
site=Wikipedia
page="Checking whether a coin is fair"
url=https://en.wikipedia.org/wiki/Checking_whether_a_coin_is_fair]][:research]
[5:01][Some insights on :performance timing from Andrei Alexandrescu[ref
site=YouTube
page="code::dive conference 2015 - Andrei Alexandrescu - Writing Fast Code I"
url=https://www.youtube.com/watch?v=vrfYLlR8X8k]]
[10:45][@riskyfive][I once argued that in a college project report. The professor wasn't very convinced. These days I would say choose a low percentile (the minimum would be the 0 percentile) and show the probability distribution]
[12:14][On using proxies to measure :performance[ref
site=YouTube
page="code::dive conference 2015 - Andrei Alexandrescu - Writing Fast Code I"
url=https://www.youtube.com/watch?v=vrfYLlR8X8k]]
[13:20][Fix up the time formula][:blackboard]
[15:19][Chapter 1.7 - The Power Wall[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[15:45][Figure 1.16 - Clock rate and power for Intel x86 microprocessors over eight generations and 30 years[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :research]
[19:47][Chapter 1.7, on energy and power[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[21:53][@riskyfive][It means proportional to]
[22:07][Energy equations][:blackboard]
[23:48][Chapter 1.7, on proportional energy[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[24:16][Pulse energy and power][:blackboard :hardware :performance]
[27:11][Chapter 1.7, frequency switched as a function of the clock rate[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[27:35][@riskyfive][This is easy to imagine. Voltage is like pressure. You have pressure when the bucket is full. To change from high pressure (full/1) to low pressure (empty/0) you have to discharge the bucket. The size of the bucket (capacitive load) is what gets wasted, in proportion to the pressure with which the water came out]
[28:22][Chapter 1.7, on the different growth factors of clock rate and power[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[29:12][Chapter 1.7, Example: Relative Power[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[31:58][Power ratio][:blackboard :hardware :performance]
[35:08][Chapter 1.7, power leakage and distribution[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[38:20][Chapter 1.8 - The Sea Change: The Switch from Uniprocessors to Multiprocessors[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[40:41][A few words on eschewing reliance on more powerful hardware being a driving factor of the Handmade Network]
[43:15][@miblo][Culture of laziness, or of "disengagement", perhaps?]
[43:26][A few words on cultural differences of software companies]
[45:25][Chapter 1.8, quote from Brian Hayes on scoring music for a solo performer vs an orchestra[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[46:08][Chapter 1.8, Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[47:35][Figure 1.17 - Growth in processor performance since the mid-1980s[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[50:45][A discussion point on explicit and implicit parallel programming][:optimisation]
[52:59][@riskyfive][Auto vectorization?]
[53:19][On using parallelism in D][:language :optimisation]
[55:57][@riskyfive][I'm not aware of any convincing path to some magic bullet solution]
[56:18][On pure functional programming in Haskell][:language]
[57:44][Chapter 1.8, on the difficulty to write explicitly parallel programs[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[1:00:20][Chapter 1.8, summaries of parallelism throughout the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[1:03:30][Chapter 1.8, preview of Chapter 6 on parallel programming[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :performance :research]
[1:05:03][Chapter 1.8, quote from J. Presper Eckert on computers in general[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:05:48][We're out of time for today]
[1:06:48][@riskyfive][By the way, I asked [@cmuratori Casey Muratori] about porting [~hero Handmade Hero] to an FPGA-based system (like mine) instead of / in addition to the Raspberry Pi. He said cool, email me. I did, but I haven't heard back]
[1:07:17][Stay RISCY, everyone!]
[/video]

64
miotatsu/riscy/book/coad006.hmml
View File

@ -1,64 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.9" vod_platform=youtube id=M6lqzkxEngc annotator=Miblo]
[0:02][Recap and set the stage for the day]
[1:27][Chapter 1.9 - Real Stuff: Benchmarking the Intel Core i7[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[4:04][Note that SPEC CPU2006 may not be the latest benchmark]
[4:31][Chapter 1.9, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[5:40][Figure 1.18 - SPECINTC2006 benchmarks running on a 2.66 GHz Intel Core i7 920[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[10:50][Note that the execution time and reference time for bzip2 and perl are flipped]
[11:25][Figure 1.18, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[16:52][Understanding :performance]
[19:55][:Performance equations][:blackboard]
[23:04][Computing the theoretical CPU time for the benchmarks from Figure 1.18][:performance]
[32:26][Express scepticism about what exactly is being benchmarked here][:performance]
[34:54][Continue computing those theoretical CPU times][:performance]
[36:51][Every benchmark matches the ]
[37:19][Chapter 1.9, continued: SPEC CPU Benchmark[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[40:18][On being in the process of studying :statistics]
[41:35][Chapter 1.9, continued: SPEC Power Benchmark[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[42:02][Figure 1.19 - SPECpower_ssj2008 running on a dual socket 2.66 GHz Intel Xeon X5650 with 16 GB of DRAM and one 100 GB SSD disk[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[45:23][Reflecting on this power benchmarking][:performance]
[46:22][Power equation][:blackboard]
[47:13][Chapter 1.9, continued: SPEC Power Benchmark[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[49:13][Look ahead to Chapters 1.10, 1.11, 1.12 and 1.13]
[51:08][Leave that for next week]
[/video]

89
miotatsu/riscy/book/coad007.hmml
View File

@ -1,89 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.10-1.11, Check Yourself Review" vod_platform=youtube id=01mtcp0lb4s annotator=Miblo]
[0:08][Recap and set the stage for the day]
[0:53][Chapter 1.10 - Fallacies and Pitfalls[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[3:52][Calculating speed-up]
[5:33][Chapter 1.10, continued - Amdahl's Law[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[6:08][Amdahl's Law][:blackboard :performance]
[11:18][Chapter 1.10, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[12:09][Dream about a :profiling tool that performs Amdahl's Law][:performance]
[14:50][Chapter 1.10, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[15:28][Recall the words of @RiskyFive on Amdahl's Law]
[16:28][Chapter 1.10, continued - Fallacy: Computers at low utilization use little power[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[18:55][Chapter 1.10, continued - Fallacy: Designing for performance and designing for energy efficiency are unrelated goals[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[19:35][Chapter 1.10, continued - Pitfall: Using a subset of the performance equation as a performance metric[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[26:06][Chapter 1.10, continued - Check Yourself: Comparing MIPS rating and computer speed[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[31:08][Chapter 1.11 - Concluding Remarks[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[38:07][Chapter 1.12 - Historical Perspective and Further Reading[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[47:10][Online Chapter 1.12 - Historical Perspective and Further Reading[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[48:23][Chapter 1.13 - Exercises[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[54:35][Recap our answers[ref
site=YouTube
page="Book Club - Day 4: COAD 1.5 & 1.6"
url=https://www.youtube.com/watch?v=p_XelOwyhUQ]][:research]
[1:02:43][Chapter 1.13 - Exercises, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:09:38][Skip these answers with the determination to look at them another day]
[1:10:10][Look forward to the next episode]
[/video]

85
miotatsu/riscy/book/coad008.hmml
View File

@ -1,85 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.12" vod_platform=youtube id=z86lC1Q93sQ annotator=Miblo]
[0:06][Set the stage for the day]
[0:53][Online Chapter 1.12 - Historical Perspective and Further Reading[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[12:22][Determine to read Burks et al., 1946]
[13:47][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[13:59][Recall seeing Zuse's machine in the German Museum of Technology in Berlin[ref
site="Deutsches Technikmuseum"
url=http://sdtb.de/546/]]
[14:19][@brethudson][Evening]
[14:24][Recommend checking out the German Museum of Technology]
[14:40][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[23:05][Online Chapter 1.12, continued - Abstraction[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[27:28][Reminisce about the Apple IIe][:trivia]
[29:21][Online Chapter 1.12, continued - Hierarchy[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[32:49][Recommend 'The Mother of all Demos' by Douglas Engelbart[ref
site=YouTube
page="The Mother of All Demos, presented by Douglas Engelbart (1968)"
url=https://www.youtube.com/watch?v=yJDv-zdhzMY]]
[34:48][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[35:29][Online Chapter 1.12, continued - Measuring Performance[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[37:16][Recall issues with MIPS from the previous chapter]
[37:36][Online Chapter 1.12, continued - The Quest for an Average Program[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[39:23][Point out that one of the demos in the Freedom E SDK is called dhrystone]
[40:26][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[41:43][Online Chapter 1.12, continued - SPECulating about :Performance[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[46:48][Wonder if the baseline is still the Sun SPARC Station 10/40]
[47:09][Online Chapter 1.12, continued - The Growth of Embedded Computing[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[49:20][Online Chapter 1.12, continued - A Half-Century of Progress[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[1:11:52][Reflect on the unimaginable improvements in price per performance over time]
[1:12:46][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[1:13:12][Online Chapter 1.12, continued - Further Reading[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[1:17:53][Recall Andrew and Yunsup mentioning Computer Architecture: A Quantitative Approach getting a RISC-V edition[ref
site=YouTube
page="RISCY BUSINESS - Day 18: Andrew Waterman & Yunsup Lee Interview"
url=https://www.youtube.com/watch?v=Df-o29DkqWw]]
[1:18:29][Online Chapter 1.12, continued[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]][:research]
[1:21:36][Reflect on the extensive Further Reading list]
[1:23:29][That is the end of 1.12]
[1:24:04][Shout out to new backers: Sergio González, Larry Glock and Hossein]
[/video]

253
miotatsu/riscy/book/coad009.hmml
View File

@ -1,253 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="Burks 1946 Paper" vod_platform=youtube id=7as20VDVjyM annotator=Miblo]
[0:06][@hossein1387][Hey!]
[0:11][Set the stage for the day]
[0:40][@riskyfive][Back]
[0:46][Remember to continue reviewing the check yourself[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]]
[1:16][@riskyfive][Are you going out of order on the book?]
[1:44][Note that today we will be reading Chapter 4 of some reference[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Beumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]]
[2:12][Point out video recommendations in the Further Reading[ref
site=YouTube
page="Computer Pioneers"
url=https://www.youtube.com/playlist?list=PLDE448AC4AC412129]]
[4:00][Recommend 'The Machine That Changed the World'[ref
site=YouTube
page="The Machine That Changed the World"
url=https://www.youtube.com/playlist?list=PLcEaxFOVJTbGjG-wcuHWSrWBB9BIzQZaJ]]
[5:16][Determine to continue reviewing the Check Yourself answers]
[5:40][@riskyfive][Bittorrent. The library of Alexandria of the modern world]
[5:45][Find the annotations for the last episode[ref
site=YouTube
page="Book Club - Day 7: COAD 1.10-1.11, Check Yourself Review"
url=https://www.youtube.com/watch?v=01mtcp0lb4s]]
[9:35][@riskyfive][Today's a marathon?]
[9:59][Consult the last annotations to see where we were up to[ref
site=YouTube
page="Book Club - Day 7: COAD 1.10-1.11, Check Yourself Review"
url=https://www.youtube.com/watch?v=01mtcp0lb4s]]
[10:43][@riskyfive][Inception]
[11:41][Jump to Book Club Day 4[ref
site=YouTube
page="Book Club - Day 4: COAD 1.5 & 1.6"
url=https://www.youtube.com/watch?v=p_XelOwyhUQ] to continue recapping our Check Yourself answers (from 1.6, page 33)]
[16:37][@croepha][Hey Buddy]
[16:47][Continue to review our Check Yourself answers (from 1.6, page 33: 1c)[ref
site=YouTube
page="Book Club - Day 4: COAD 1.5 & 1.6"
url=https://www.youtube.com/watch?v=p_XelOwyhUQ]]
[18:15][@croepha][Maybe next time you can tune into the VOD for this episode, make it an inception tradition]
[19:12][Continue to review our Check Yourself answers (from 1.6, page 33: 2)[ref
site=YouTube
page="Book Club - Day 4: COAD 1.5 & 1.6"
url=https://www.youtube.com/watch?v=p_XelOwyhUQ]]
[20:45][Note that in this episode the algebra on the blackboard was covered by the overlay, and determine to draw a line in Milton to indicate the overlay]
[21:37][Continue to review our Check Yourself answers (from 1.6, page 40)[ref
site=YouTube
page="Book Club - Day 4: COAD 1.5 & 1.6"
url=https://www.youtube.com/watch?v=p_XelOwyhUQ]]
[25:44][Review our Check Yourself answer (1.10, page 51)[ref
site=YouTube
page="Book Club - Day 7: COAD 1.10-1.11, Check Yourself Review"
url=https://www.youtube.com/watch?v=01mtcp0lb4s]]
[29:57][Embark on reading 'Preliminary discussion of the logical design of an electronic computing instrument'[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]]
[30:11][1. Principal components of the machine[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[34:28][2. First remarks on the :memory[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[37:22][A few thoughts on their motivations from mathematical problems]
[38:13][2.3[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[39:16][@riskyfive][That came with the IBM 360]
[39:41][@riskyfive][8-bit bytes]
[39:57][2.3 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[40:42][3. First remarks on the control and code[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[41:47][Check out the biographies of Arthur Burks[ref
site=Wikipedia
page="Arthur Burks"
url=https://en.wikipedia.org/wiki/Arthur_Burks] and Herman Goldstine[ref
site=Wikipedia
page="Herman Goldstine"
url=https://en.wikipedia.org/wiki/Herman_Goldstine] for the historical context of this paper][:research]
[46:17][3.2[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[50:08][Note that here they are talking about the concept of flow control]
[50:15][3.5 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[52:24][4. The :memory organ[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[53:40][Express surprise that they were already talking about :memory hierarchies way back then]
[53:57][4.1 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:memory :research]
[54:08][Recall how Zuse used vacuum tubes in the creation of computers]
[55:10][4.1 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:memory :research]
[56:39][Read about Iconoscope[ref
site=Wikipedia
page=Iconoscope
url=https://en.wikipedia.org/wiki/Iconoscope]]
[57:50][4.1 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:memory :research]
[1:00:03][Note that this must have been around the time of the Institute for Advanced Study]
[1:00:28][4.1 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:memory :research]
[1:10:50][5. The arithmetic organ[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :"numeral system" :research]
[1:30:11][@riskyfive][Later]
[1:30:22][5.6 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:31:26][Recall a sleepless night thinking about carry lookahead adders][:blackboard :mathematics]
[1:34:19][5.6 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:40:47][Recall going over adders on ~riscy]
[1:41:05][5.7 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:49:17][Note difficulty in following their logic of how they represent negative numbers]
[1:49:51][5.7 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:51:11][Note that they arrived back at what we were expecting, and were possibly using two's complement][:mathematics]
[1:51:48][5.7 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:54:51][Subtraction using a combination of ones' and two's complement][:blackboard :mathematics]
[1:56:21][5.8[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[1:58:13][A few words on multiplication circuits[ref
site=Wikipedia
page="Karatsuba algorithm"
url=https://en.wikipedia.org/wiki/Karatsuba_algorithm]][:experience :mathematics]
[2:01:08][Mio's multiplication method: Vedic][:blackboard :experience]
[2:04:45][5.8 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:08:42][See how many digits of π we know today]
[2:09:52][5.8 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:14:57][A few words on their focus on the importance of decimal, despite calculating in fixed point]
[2:16:18][5.9 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:19:41][Note that we're only reading this for the historical perspective]
[2:21:40][5.12[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:33:01][5.13[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:43:14][5.15[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:mathematics :research]
[2:45:17][6. The control[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[2:49:15][A few words on demuxers and multiplexers]
[2:50:21][6.2 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[2:53:20][A few words on tetrads and nibbles]
[2:54:02][6.3 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[2:56:49][Point out that they are here describing a demuxer]
[2:57:27][6.3 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:00:13][Note that the CC is the program counter]
[3:00:53][6.4 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:04:19][Note that we've dived into clock :hardware in the RISC-V]
[3:04:45][6.4 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:10:17][6.6[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:24:26][Note that they're here talking about functions]
[3:25:18][6.6.6[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:27:25][Note that they hadn't thought of having a separate floating point unit in the same machine]
[3:28:42][6.6.7 continued[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:30:58][6.7[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:32:48][Table 1: Operations[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:34:58][6.8[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Neumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:research]
[3:46:22][Reflect on the reading, double-checking that that was indeed the paper we wanted to read[ref
site="Elsevier Companion Materials"
page="Patterson, Hennessy: Computer Organization and Design, 5th Edition"
url=http://booksite.elsevier.com/9780124077263/historial_perspectives.php]]
[3:50:23][That's gonna end it for this episode]
[/video]

168
miotatsu/riscy/book/coad010.hmml
View File

@ -1,168 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.13 Exercises 1-8" vod_platform=youtube id=tX7sVfF3pew annotator=Miblo]
[0:08][Recap and set the stage for the day]
[4:17][Attempt to access the Instructor Materials[ref
site=Elsevier
page=Textbooks
url=https://textbooks.elsevier.com/web/Login.aspx?MREDIR=../web/Manuals.aspx?isbn%3D9780123747501]]
[6:04][Create a thread for peer-reviewing the exercises in the ~riscy forums[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]]
[9:56][Chapter 1.13 - Exercises[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[13:54][Chapter 1.13, Exercise 1.1 - Aside from the smart cell phones used by a billion people, list and describe four other types of computers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[18:25][A few words on D-Wave Systems[ref
site=Wikipedia
page="D-Wave Systems"
url=https://en.wikipedia.org/wiki/D-Wave_Systems]]
[20:01][Recommend 'UNBOXING A QUANTUM COMPUTER! - Holy $HIT Ep 19'[ref
site=YouTube
page="UNBOXING A QUANTUM COMPUTER! - Holy $HIT Ep 19"
url=https://www.youtube.com/watch?v=60OkanvToFI]]
[22:45][Tying this is in to RISC-V]
[24:06][Shout-out to Intel Nervana - Inside Artificial Intelligence[ref
site="Intel Nervana"
url=https://www.intelnervana.com/]][:ai]
[27:13][Chapter 1.13, Exercise 1.2 - Match the eight great ideas from computer architecture to the following ideas from other fields[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[30:33][Read about suspension bridges[ref
site=Wikipedia
page="Suspension bridge"
url=https://en.wikipedia.org/wiki/Suspension_bridge]][:engineering]
[32:54][Chapter 1.13, Exercise 1.2 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[43:59][Chapter 1.13, Exercise 1.2 - Our mapping of the eight great ideas in computer architecture to the ideas from other fields][:blackboard]
[54:14][Read about library reserve desks[ref
site="University of Louisiana at Lafayette"
page="Reserve Desk"
url=http://library.louisiana.edu/services/circulation-services/reserve-desk][ref
site="Luther College"
page="Reserve Desk"
url=http://www.luther.edu/library/about/services/reserve-desk/]][:research]
[58:41][Chapter 1.13, Exercise 1.2 - Our mapping continued][:blackboard]
[1:01:06][Read about electromagnetic aircraft catapults[ref
site=Wikipedia
page="Aircraft catapult"
url=https://en.wikipedia.org/wiki/Aircraft_catapult]][:research]
[1:05:42][Chapter 1.13, Exercise 1.2 - Our mapping continued][:blackboard]
[1:16:42][Chapter 1.13, Exercise 1.3 - Describe the steps that transform a program written in a high-level :language such as C into a representation that is directly executed by a computer processor[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:20:54][Chapter 1.13, Exercise 1.4 - :Memory and speed considerations of :rendering a bitmap[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:22:09][Plug pcalc[ref
site=Twitter
page="Got text input working for pcalc, still just using xcb for the backend, executable is 127K right now statically linked to everything"
url=https://twitter.com/hmn_riscy/status/893976727646597121][ref
site="RISCY BUSINESS Blog"
page="July Overview"
url=https://riscy.handmade.network/blogs/p/2524]]
[1:25:33][Chapter 1.13, Exercise 1.4 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:32:21][Chapter 1.13, Exercise 1.5 - Calculating CPU :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:38:24][Chapter 1.13, Exercise 1.5a - Our CPU :performance calculations][:blackboard]
[1:55:29][Chapter 1.13, Exercise 1.5a continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:58:09][Chapter 1.13, Exercise 1.5b - CPU cycles and instructions[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[1:59:58][Chapter 1.13, Exercise 1.5b - Calculating CPU cycles and instructions][:blackboard :performance]
[2:08:24][Chapter 1.13, Exercise 1.5c - Reducing execution time[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:10:06][Chapter 1.13, Exercise 1.5c - Calculating the desired clock rate][:blackboard :performance]
[2:21:57][Chapter 1.13, Exercise 1.6 - Comparing ISA implementations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[2:35:19][Chapter 1.13, Exercise 1.7 - Comparing compiler :performance[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:36:57][Chapter 1.13, Exercise 1.7a - Calculating the average CPI for each program][:blackboard :performance]
[2:41:54][Chapter 1.13, Exercise 1.7b - Calculating the clock rates of two processors running the two compilers' code][:blackboard :performance]
[2:46:02][Chapter 1.13, Exercise 1.7c - Calculating compiler speedup][:blackboard :performance]
[2:51:53][Chapter 1.13, Exercise 1.8 - Energy consumption[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[2:52:40][Chapter 1.13, Exercise 1.8.1 - Calculating average capacitive load][:blackboard]
[2:58:01][Chapter 1.13, Exercise 1.8.2 - Calculating percentage of total dissipated power][:blackboard]
[3:03:55][Review Chapter 1.7, The Power Wall - Elaboration[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[3:06:22][:Research Power factor[ref
site=Wikipedia
page="Power factor"
url=https://en.wikipedia.org/wiki/Power_factor]]
[3:14:38][:Research power dissipation[ref
site="Evil Mad Scientist"
page="Basics: Power dissipation and electronic components"
url=http://www.evilmadscientist.com/2012/basics-power-dissipation-and-electronic-components/]]
[3:31:04][Chapter 1.13, Exercise 1.8.2 continued][:blackboard]
[3:36:27][Chapter 1.13, Exercise 1.8.3 - Calculating voltage reduction required to maintain same leakage current for a 10% lower total dissipated power][:blackboard]
[3:48:53][Chapter 1.13, Exercise 1.9 - Parallelism[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[3:51:42][Call it here]
[3:53:24][Shout-out to Patreon supporters]
[3:55:15][Plug pcalc[ref
site=Twitter
page="Got text input working for pcalc, still just using xcb for the backend, executable is 127K right now statically linked to everything"
url=https://twitter.com/hmn_riscy/status/893976727646597121]]
[/video]

84
miotatsu/riscy/book/coad011.hmml
View File

@ -1,84 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.13 Exercises 9-10" vod_platform=youtube id=JgxH7lkETqc annotator=Miblo]
[0:06][Recap and set the stage for the day, with no internet]
[5:08][Chapter 1.13, Exercise 1.9 - Parallelism[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[6:37][Chapter 1.13, Exercise 1.9 - CPIs for our instructions][:blackboard]
[12:21][Chapter 1.13, Exercise 1.9.1 - Total execution time and speedup over multiple cores[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[14:46][Chapter 1.13, Exercise 1.9.1 - Computing that execution time and speedup over multiple cores[ref
site=Wikipedia
page=Hertz
url=https://en.wikipedia.org/wiki/Hertz]][:blackboard :performance]
[23:41][Consider parallelising functions][:optimisation]
[27:18][@croepha][Hello]
[27:39][Chapter 1.13, Exercise 1.9.1 continued][:blackboard :performance]
[30:57][Consider the number of characters in this computation, for pcalc]
[32:35][Chapter 1.13, Exercise 1.9.1 continued][:blackboard :performance]
[35:32][@croepha][I try to bypass X11 as much as possible. I pretty much just get an OpenGL context with glx and then do direct rendering][:rendering]
[38:05][Recommend BetterOS.org[ref
site=Twitter
page="I stumbled onto a real gem today: \"Low-Level Graphics on Linux\""
url=https://twitter.com/hmn_riscy/status/895532169891790848]]
[39:40][Chapter 1.13, Exercise 1.9.1 continued][:blackboard :performance]
[40:39][Plug the 'COAD 1.13 Exercises' forum thread[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]]
[41:13][Chapter 1.13, Exercise 1.9.2 - Impact of doubling the CPI of the arithmetic instruction[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[42:17][Chapter 1.13, Exercise 1.9.2 - Computing the impact of doubling the arithmetic instruction CPI][:blackboard :performance]
[46:33][@croepha][Do you find it important to do the math out by hand? I'd be really tempted to just use a spreadsheet]
[48:12][Chapter 1.13, Exercise 1.9.2 continued][:blackboard :performance]
[48:34][Chapter 1.13, Exercise 1.9.3 - Reducing the CPI of load / store instructions to enable a single processor to match a quad core[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:performance :research]
[49:38][Chapter 1.13, Exercise 1.9.3 - Computing the necessary CPI reduction][:blackboard :performance]
[55:01][@insofaras][I also got 3.8]
[55:23][Chapter 1.13, Exercise 1.9.3 continued][:blackboard :performance]
[55:44][@insofaras][But I just tuned in and don't know what I'm doing]
[56:30][Chapter 1.13, Exercise 1.9.3 continued][:blackboard :performance]
[1:00:00][Chapter 1.13, Exercise 1.10 - :Fabrication yield and cost[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:03:12][Chapter 1.13, Exercise 1.10.1 - Computing the yield for our wafers][:blackboard :fabrication]
[1:05:35][@insofaras][Are these exercises available online?]
[1:07:14][Tease a giveaway for reaching 100 YouTube subscribers[ref
site=YouTube
page="RISCY BUSINESS"
url=https://www.youtube.com/channel/UCDw2ohIbGAoWWMq8fVAfNXg]]
[1:08:21][@croepha][Might be worth contacting the publisher. They might just give you some stuff, as it might be good PR for them]
[1:10:46][@croepha][Hmm, interesting. I think that if you are only using, like, 10% (or something like that) of the original work, then it's considered fair use. But I'm not a lawyer]
[1:13:18][@insofaras][RMS said it was better to steal bread than write proprietary software]
[1:13:35][Chapter 1.13, Exercise 1.10.1 continued][:blackboard :fabrication]
[1:15:47][@croepha][I'm not sure I agree that piracy is a good thing, but we can save that discussion for another time. Don't want to hijack the stream. I could talk about it on my stream some time if someone brings it up]
[1:17:11][Chapter 1.13, Exercise 1.10.1 continued][:blackboard :fabrication]
[1:23:26][@insofaras][I would've thought they'd use square or rectangular dies, but I have, like, no knowledge of this stuff]
[1:25:03][@insofaras][Oh right, maybe I meant wafer]
[1:27:01][Chapter 1.13, Exercise 1.10.1 continued][:blackboard :fabrication]
[1:37:10][Chapter 1.13, Exercise 1.10.2 - Computing the cost per die for both wafers][:blackboard :fabrication]
[1:40:20][Chapter 1.13, Exercise 1.10.3 - Computing the new die area and yield for 10% more dies per yield and 15% more defects per area unit][:blackboard :fabrication]
[1:51:58][Chapter 1.13, Exercise 1.10.1 - Recomputing the yield for our wafers, trusting the algebra][:blackboard :fabrication]
[1:54:45][Chapter 1.13, Exercise 1.10.3 continued][:blackboard :fabrication]
[1:58:04][Chapter 1.13, Exercise 1.10.1 - Finish recomputing the yield for our original wafers][:blackboard :fabrication]
[2:00:20][Chapter 1.13, Exercise 1.10.1 - Recomputing the cost per die for our wafers][:blackboard :fabrication]
[2:01:49][Chapter 1.13, Exercise 1.10.4 - Computing the defects per area unit for a 0.92 to 0.95 increased yield from a die of area 200mm²][:blackboard :fabrication]
[2:14:04][Call it here]
[/video]

48
miotatsu/riscy/book/coad012.hmml
View File

@ -1,48 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.13 Exercise 11" vod_platform=youtube id=PjbIO3gcwgc annotator=Miblo]
[0:07][Recap and set the stage for the day]
[0:36][Chapter 1.13, Exercise 1.11 - :Performance benchmarking[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[4:54][Chapter 1.13, Exercise 1.11.1 - Finding the CPI for a clock cycle time of 0.333ns][:blackboard :performance]
[17:21][Chapter 1.13, Exercise 1.11.2 - Finding the SPECratio][:blackboard :performance]
[20:20][Chapter 1.13, Exercise 1.11.3 - Finding the increased CPU time for a 10% increase in the number of instructions][:blackboard :performance]
[26:17][Chapter 1.13, Exercise 1.11.4 - Finding the increased CPU time for an additional 5% increase in the CPI][:blackboard :performance]
[28:25][Chapter 1.13, Exercise 1.11.5 - Finding the SPECratio for these new specifications][:blackboard :performance]
[29:45][Chapter 1.13, Exercise 1.11.6 - Finding the CPI for our bzip2 benchmark running on a newly developed processor][:blackboard :performance]
[34:31][Chapter 1.13, Exercise 1.11.7 - Comparing this increase in the CPI to that of the clock rate][:blackboard :performance]
[44:25][Chapter 1.13, Exercise 1.11.8 - Calculating by how much the CPU time has been reduced[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:blackboard :performance]
[45:53][Chapter 1.13, Exercise 1.11.9 - Determining the number of instructions for a second benchmark, libquantum, with a 10% reduced execution time and increased clock rate to 4GHz][:blackboard :performance]
[49:33][Shout-out to WolframAlpha[ref
site=WolframAlpha
url=https://www.wolframalpha.com/]]
[52:23][Chapter 1.13, Exercise 1.11.9 continued[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:blackboard :performance]
[56:15][Consult @Miblo's reply to the 'COAD 1.13 Exercises' forum thread[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:hardware :performance]
[59:16][Transistor][:blackboard :hardware]
[1:03:16][Continue addressing @Miblo's post[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:hardware :performance]
[1:09:11][Pipelining[ref
site=YouTube
page="Life Process Optimization - Ep 5 - Jeff and Casey Show 2013"
url=https://www.youtube.com/watch?v=ljdI5QZFU8I]][:blackboard]
[1:23:25][Continue addressing @Miblo's post[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:hardware :performance]
[1:28:49][Chapter 1.13, Exercise 1.11.10 - Determining the clock rate required for a further 10% reduction in CPU time, while the number of instructions and CPI remain unchanged][:blackboard :performance]
[1:35:26][Chapter 1.13, Exercise 1.11.11 - Determining the clock rate for a reduced CPI of 15% and CPU time of 20%, while the number of instructions remains unchanged][:blackboard :performance]
[1:37:40][Wrap up, with a few words on the streaming schedule structure]
[/video]

80
miotatsu/riscy/book/coad013.hmml
View File

@ -1,80 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.13 Exercises 12-15" vod_platform=youtube id=Qsz_j4gmzL0 annotator=Miblo]
[0:06][Recap and set the stage for the day]
[1:34][Chapter 1.13, Exercise 1.12 - The pitfall of utilizing a subset of the :performance equations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[4:01][Chapter 1.13, Exercise 1.12.1 - Fallaciously equating clock rate with :performance]
[6:45][A few words on pcalc, Unix sockets and TCP]
[7:13][Chapter 1.13, Exercise 1.12.1 continued][:performance]
[17:04][Chapter 1.13, Exercise 1.12.2 Fallaciously equating instruction count to CPU time][:performance]
[27:39][A few thoughts on processor marketing and :performance benchmarks]
[35:37][Chapter 1.13, Exercise 1.12.3 Fallaciously using MIPS to compare two different processors][:blackboard :performance]
[45:40][Chapter 1.13, Exercise 1.12.4 Fallaciously using MFLOPS to compare two different processors[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]][:blackboard :performance]
[1:02:32][Chapter 1.13, Exercise 1.13 - The pitfall of expecting to improve the overall :performance of a computer by improving only one aspect of it[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:04:20][Chapter 1.13, Exercise 1.13 - The metrics under consideration][:blackboard :performance]
[1:10:34][A few thoughts on homework questions][:rant]
[1:17:13][Amdahl's Law][:blackboard :performance]
[1:22:08][Chapter 1.13, Exercise 1.13.1 - Calculating the total time reduction for a 20% reduction in time for floating point operations][:blackboard :performance]
[1:31:08][@croepha][Hello]
[1:31:19][Chapter 1.10 - Fallacies and Pitfalls, reviewing Amdahl's Law[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research]
[1:34:47][Chapter 1.13, Exercise 1.13.1 continued][:blackboard :performance]
[1:37:02][Amdahl's Law[ref
site=Wikipedia
page="Amdahl's law"
url=https://en.wikipedia.org/wiki/Amdahl's_law]][:research]
[1:45:06][Chapter 1.13, Exercise 1.13.1 continued][:blackboard :performance]
[1:58:00][Relating our intuitive equation for Amdahl's Law back to that given in the book[ref
site=YouTube
page="Book Club - Day 7: COAD 1.10-1.11, Check Yourself Review"
url=https://www.youtube.com/watch?v=01mtcp0lb4s]][:blackboard]
[2:18:06][Work through the algebra for Amdahl's Law][:blackboard :performance]
[2:30:30][Request for help clarifying Amdahl's Law[ref
site="RISCY BUSINESS Forums"
page="COAD 1.13 Exercises"
url=https://riscy.handmade.network/forums/t/2546-coad_1.13_exercises]]
[2:31:36][Chapter 1.13, Exercise 1.13.1 concluded][:blackboard :performance]
[2:32:17][Chapter 1.13, Exercise 1.13.2 - Calculating the time reduction for integer operations given a total time reduction of 20%][:blackboard :performance]
[2:35:26][Consult the Errata[ref
site=Elsevier
page="Computer Organization and Design, 5th Edition: Errata"
url=http://booksite.elsevier.com/9780124077263/downloads/COD5e_errata_09-2014.pdf]]
[2:39:43][Chapter 1.13, Exercise 1.13.2 continued][:blackboard :performance]
[2:44:10][Chapter 1.13, Exercise 1.13.3 - Trying to reduce the total time by 20% by reducing only the time for branch instructions][:blackboard :performance]
[2:45:34][Chapter 1.13, Exercise 1.14 - Improving the execution time of a given program[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research :performance]
[2:47:10][Chapter 1.13, Exercise 1.14 - The metrics under consideration][:blackboard :performance]
[2:58:11][Chapter 1.13, Exercise 1.14.1 - Improving the CPI of floating point instructions to make the program run two times faster][:blackboard :performance]
[3:01:07][Chapter 1.13, Exercise 1.14.2 - Improving the CPI of load / store instructions to make the program run two times faster][:blackboard :performance]
[3:07:55][Chapter 1.13, Exercise 1.14.3 - Calculating the execution time improvement given a reduced CPI of integer and floating point instructions by 40%, and load / store and branch instructions by 30%][:blackboard :performance]
[3:16:50][Chapter 1.13, Exercise 1.15 - Parallel processing[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:research :performance]
[3:18:09][Break]
[3:21:20][:afk]
[3:25:59][Return with nourishment]
[3:27:38][Chapter 1.13, Exercise 1.15 - Computing :performance metrics for a program running on multiple parallel processors][:blackboard :performance]
[3:50:37][Reflect on our experience so far, and look forward to Chapter 2]
[/video]

108
miotatsu/riscy/book/coad014.hmml
View File

@ -1,108 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="2.1-2.2" vod_platform=youtube id=YD9fUS0ADTM annotator=Miblo]
[0:09][Recap and set the stage for the day]
[0:26][Chapter 2 - Instructions: Language of the Computer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[1:47][Chapter 2.1 - Introduction[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[6:30][Mention 'Preliminary discussion of the logical design of an electronic computing instrument'[ref
author="Arthur W. Burks, Herman H. Goldstine, John von Beumann"
title="Preliminary discussion of the logical design of an electronic computing instrument"
url=https://www.cs.princeton.edu/courses/archive/fall10/cos375/Burks.pdf]][:speech]
[6:53][Chapter 2.1 continued][:isa]
[9:26][Chapter 2.2 - Operations of the Computer Hardware[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[11:36][Thoughts on this sequence of instructions to add four variables][:isa :speech]
[13:28][Chapter 2.2 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
[14:58][Figure 2.1 - RISC-V assembly language revealed in this chapter[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[19:41][Recommend buying a copy of the book or checking the online documentation[ref
site="RISCY BUSINESS Forums"
page="Useful Links"
url=http://links.riscy.tv]][:speech]
[20:42][Figure 2.1 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[21:28][Chapter 2.1 Example 1 - Compiling Two C Assignment Statements into RISC-V[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[22:46][Translating C code into RISC-V assembly][:asm :blackboard]
[31:08][Chapter 2.1 Answer 1[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[32:07][Chapter 2.1 Example 2 - Compiling a Complex C Assignment into RISC-V[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[32:50][Translating complex C code into RISC-V assembly][:asm :blackboard :optimisation]
[37:19][Chapter 2.1 Answer 2[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[37:53][Thoughts on their choice to use t0][:speech]
[39:13][Chapter 2.1 Answer 2 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[40:28][Chapter 2.1 Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[42:09][Peruse Hello World Enterprise Edition[ref
site=GitHub
page=lolzballs/HelloWorld.java
url=https://gist.github.com/lolzballs/2152bc0f31ee0286b722]][:language :rant :research]
[54:27][Ordering languages by lines of code][:blackboard :language]
[58:25][Compare the objdump of an optimised build of pcalc's test.c with its C code][:asm :rant :research]
[1:06:17][Finishing ordering languages by lines of code][:blackboard :language]
[1:06:35][Chapter 2.1 Check Yourself Elaboration[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[1:08:07][Chapter 2.1 Check Yourself Answer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:language]
[1:11:03][End it here][:speech]
[/video]

92
miotatsu/riscy/book/coad015.hmml
View File

@ -1,92 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="C vs. ASM, 2.3" vod_platform=youtube id=El_YbdOi42U annotator=Miblo]
[0:13][Recap and set the stage for the day, with thoughts on comparing the code sizes of various languages][:speech]
[2:58][Perform a more rigorous "Hello, World!" comparison between C and x86 :asm][:language :programming]
[9:57][@supersaiyengunner][Just passing by seeing what’s on and I heard I don’t need sake]
[10:34][Note that start.S will be shared between :asm and C][:language :programming]
[11:02][@supersaiyengunner][Now I’m clueless]
[11:38][@supersaiyengunner][I just found you]
[12:13][Pull up the existing clang invocation for test.c][:programming]
[13:01][@supersaiyengunner][I’m down to learn]
[14:24][Build and consult the objdump for our program][:programming]
[15:54][Create hello.S][:asm :programming]
[17:02][@supersaiyengunner][I must absorb your knowledge so I can become more powerful]
[17:42][Remove excess lines from hello.S][:asm :programming]
[19:15][Compare the lines of code in hello.S and test.c][:language :asm :programming]
[21:50][Chapter 2.3 - Operands of the Computer Hardware[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[24:41][Sketch out a way to deal with the limited number of :hardware registers, with thoughts on portable software][:programming]
[41:12][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[44:10][Recall [@cmuratori Casey]'s explanation of how the speed of light can become a bottleneck[ref
site=YouTube
page="Intro to C on Windows - Day 3"
url=https://www.youtube.com/watch?v=T4CjOB0y9nI]][:hardware]
[52:49][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[55:40][Chapter 2.3 Example 1 - Compiling a C Assignment Using Registers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :hardware]
[56:29][Our answer to Chapter 2.3 Example 2][:asm :blackboard :hardware]
[1:00:32][Setup the tablet][:admin]
[1:01:51][Putting variables into RISC-V registers][:blackboard :hardware]
[1:04:03][Compare our answer to Chapter 2.3 Example 1 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :hardware]
[1:07:37][Chapter 2.3 continued, :Memory Operands[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[1:09:51][Figure 2.2 - :Memory addresses and contents of memory at those locations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:blackboard :hardware]
[1:15:26][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware :memory]
[1:16:05][Chapter 2.3 Example 2 - Compiling an Assignment When an Operand Is in :Memory[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[1:16:51][Compiling g = h + A\[8\];][:asm :blackboard :memory]
[1:24:56][Compare our answer to Chapter 2.3 Example 2 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:25:32][Update our answer to use x22 as the base address][:blackboard :asm :memory]
[1:26:19][Continue to compare our answer to Chapter 2.3 Example 2[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:29:42][Leave the rest of Chapter 2.3 for the next day][:speech]
[/video]

178
miotatsu/riscy/book/coad016.hmml
View File

@ -1,178 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="2.3 cont." vod_platform=youtube id=blaDJl-sHgY annotator=Miblo]
[0:08][Recap and set the stage for the day with a mention of the addition of \@naked to hula[ref
site=GitHub
page="riscy-business/hula"
url=https://github.com/riscy-business/hula]][:language]
[3:56][Review the addition of "register" to hula[ref
site=GitHub
page="riscy-business/hula"
url=https://github.com/riscy-business/hula]][:language]
[6:11][Show off the hula hello.S :asm[ref
site=GitHub
page="riscy-business/hula/blog/master/hello.S"
url=https://github.com/riscy-business/hula/blob/master/hello.S]][:language]
[12:15][@riskyfive][By the way, about porting D to RISC-V. I'm stalled on a GCC bug. Exception support in GCC / glibc has a bug, but people from SiFive are working on it][:language]
[12:49][Thoughts on writing :asm and architectural and general portability[ref
site=GitHub
page="riscy-business/hula/blog/master/hello.S"
url=https://github.com/riscy-business/hula/blob/master/hello.S]][:language :speech]
[15:43][Jump into the book][:speech]
[16:50][Compiling an Assignment When an Operand Is in :Memory[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :blackboard]
[19:25][Our answer to Chapter 2.3 'Compiling an Assignment When an Operand Is in :Memory'[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :blackboard]
[20:33][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[23:09][Figure 2.3 Actual RISC-V :memory addresses and contents of memory for those doublewords][:blackboard]
[23:54][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[24:30][Endianness, with a fun fact: It's a reference to Gulliver's Travels][:language :speech]
[25:56][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[26:39][@riskyfive][We should write things on paper little endian style][:language]
[27:07][Thoughts on "endianness" in RTL vs LTR languages][:language :speech]
[29:20][@riskyfive][Yes, yes, that's the reasoning that'll eventually convince you that we should change to little endian on paper. Let the endianness flow through you. Come to the little side of the force][:language]
[29:48][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[31:21][Thoughts on :asm syntax, with a mention of [@pervognsen Per]'s chosen syntax for his assembler][:blackboard :language]
[34:52][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[37:12][Thoughts on alignment of :memory accesses][:speech]
[38:35][@riskyfive][Got to go. Good night!]
[38:44][On RISC-V's ability to do unaligned :memory accesses][:speech]
[39:54][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[40:35][Thoughts on the marketing of hard drive and :memory capacities, and confusion of units][:speech]
[44:50][Chapter 2.3 Example 3 - Compiling Using Load and Store[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[45:26][A\[12\] = h + A\[8\];][:asm :blackboard :memory]
[53:24][Compare our answer to Chapter 2.3 Example 3 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[55:33][Thoughts on calling conventions][:asm :language :speech]
[1:01:27][Continue to compare our answer to Chapter 2.3 Example 3 with the book,[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4] with thoughts on destructive operations][:asm]
[1:09:01][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:09:21][The stack][:memory :speech]
[1:13:18][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:13:45][Using saved registers and temporaries, and the concept of spilling to the stack][:memory :speech]
[1:16:39][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:18:08][Chapter 2.3 Elaboration[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:18:48][Hierarchy of Caches][:memory :speech]
[1:22:09][Chapter 2.3 - Constant or Immediate Operands[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:25:24][Chapter 2.3 - Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:26:29][Virtual vs actual registers][:isa :memory :speech]
[1:29:39][Our answer to Chapter 2.3 - Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:30:58][Chapter 2.3 Check Yourself Answer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:32:35][Chapter 2.3 Elaborations on registers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:36:32][C type widths, and data models[ref
site="IBM Knowledge Center"
page="ILP32 and LP64 data models and data type sizes"
url=https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.cbcpx01/datatypesize64.htm]][:language :speech]
[1:41:24][Show type-width handling in nwr_mem.h][:memory]
[1:46:45][Chapter 2.3 Elaborations on registers, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:49:03][Show size_t use in pcalc's linux_x86_64.c][:memory]
[1:51:14][Chapter 2.3 Elaborations on registers, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:52:19][That is the end of 2.3, with a glimpse into the next chapter][:speech]
[1:53:52][Considering the benefits of C over assembly: portability, automatic handling of calling conventions, and…][:asm :speech]
[1:57:57][The other major benefit of C over assembly, along with portability, is that it is a structured :language][:asm :speech]
[2:06:49][End the episode, with shout-outs to new supporters][:speech]
[/video]

145
miotatsu/riscy/book/coad017.hmml
View File

@ -1,145 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="2.4" vod_platform=youtube id=dzZl1zpp8XA annotator=Miblo]
[0:12][Shout-out to [@microcode Wasim] with a note on the stream organisation][:speech]
[2:55][Plug the new RISCY BUSINESS and Book Club Early Access site[ref
site="RISCY BUSINESS and Book Club \[Early Access\]"
url=https://guide.riscy.tv/]]
[7:03][Thoughts on LTR vs RTL languages][:language :speech]
[9:25][[@microcode Wasim]'s perspective on numbers in RTL languages][:language :authored]
[11:49][Set up to dive into Chapter 2.4, noting the two's complement adder we described on [~riscy RISCY BUSINESS][ref
site="RISCY BUSINESS Annotated Episode Guide"
page="two's complement"
url=https://riscy.handmade.network/episode/riscy#two's%20complement]]
[17:43][Chapter 2.4 Signed and Unsigned Numbers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[19:20][Information theory and the "bit" as the fundamental unit of data][:speech]
[20:57][Chapter 2.4 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[21:25][Numerical base][:blackboard :mathematics]
[29:30][Plug pcalc, in-development but already available to backers at $5 or more][:speech]
[30:35][Understanding bases of unsigned numbers][:blackboard :mathematics]
[32:51][Chapter 2.4 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
[37:33][Bytes split into nibbles][:blackboard]
[44:25][Why 64-bits? Because that's the register width of the HiFive Unleashed][:blackboard]
[49:06][Chapter 2.4 continued, including bit significance and the RISC-V doubleword bit length[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[52:28][Understanding sums of powers][:blackboard :mathematics]
[57:11][Chapter 2.4 continued, 64-bit unsigned number representations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[57:53][Tip of the day: Counting binary numbers on your hand][:mathematics :speech]
[1:03:21][Chapter 2.4 continued, 64-bit unsigned number representations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:05:20][Representing negative numbers][:blackboard :mathematics]
[1:07:10][Chapter 2.4 continued, 64-bit unsigned number representations[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:07:53][Chapter 2.4 :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:08:08]["Natural" bases in human history][:mathematics :speech]
[1:11:31][Chapter 2.4 :Hardware / Software Interface, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:11:39][Tidbit: Various bases in computer history][:mathematics :speech]
[1:13:02][Chapter 2.4 :Hardware / Software Interface, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:14:19][On the physical constraints of computers in terms of their numerical representation][:mathematics :speech]
[1:18:54][Chapter 2.4 continued, on overflow[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:19:21][Thoughts on overflow / underflow, and programming for machines][:speech]
[1:22:00][Chapter 2.4 continued, on sign and magnitude[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:22:26][Two's complement as a way to represent both positive and negative numbers on the same :hardware[ref
site="RISCY BUSINESS Annotated Episode Guide"
page="two's complement"
url=https://riscy.handmade.network/episode/riscy#two's%20complement]][:mathematics :speech]
[1:23:58][Chapter 2.4 continued, shortcomings of sign and magnitude[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:25:23][Positive and negative 0][:blackboard :mathematics]
[1:28:14][Chapter 2.4 continued, two's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:34:10][Understanding negative numbers in two's complement, by counting with 0s][:mathematics :speech]
[1:39:00][Chapter 2.4 continued, positive and negative numbers in two's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:43:54][On two's complement being good for :hardware designers[ref
site="RISCY BUSINESS Annotated Episode Guide"
page="Ripple Carry Adders & Two's Complement"
url=https://riscy.handmade.network/episode/riscy/riscy012/#596]][:mathematics :speech]
[1:46:56][Chapter 2.4 continued, two's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:47:30][Efficient sign-checking in two's complement][:mathematics :speech]
[1:50:11][Chapter 2.4 continued, two's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:52:35][Chapter 2.4 Example 1 - Binary to Decimal Conversion[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:mathematics]
[1:59:30][End it here with a glimpse into the next episode, thoughts on it all tying in to [~riscy RISCY BUSINESS] and thanks for all the support][:mathematics :speech]
[/video]

123
miotatsu/riscy/book/coad018.hmml
View File

@ -1,123 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="2.4 cont." vod_platform=youtube id=xEiIELp5E6Y annotator=Miblo]
[0:00][Welcome to the stream][:speech]
[0:22][Set up to clarify the explanation of two's complement from last time, with a mention of Plato's Theory of Forms[ref
site=Wikipedia
page="Theory of forms"
url=https://en.wikipedia.org/wiki/Theory_of_forms]][:blackboard :"numeral system"]
[4:14][Representations of negative numbers][:blackboard :"numeral system"]
[7:17][Mapping an entire signed nibble between -8 and 7 to the range 0–F][:blackboard :"numeral system"]
[12:59][Assigning the high bit of each value to be the sign bit][:blackboard :"numeral system"]
[17:37][Assigning the low bit of each value to be the sign bit (interleaved positive and negative)][:blackboard :"numeral system"]
[21:26][Two's complement, as a shifted mapping from -8 to 7, i.e. from 0 to 7, then -8 to -1][:blackboard :"numeral system"]
[25:57][Ones' complement, as a perfectly mirrored representation][:blackboard :"numeral system"]
[29:01][Intuitively understanding two's complement by flipping and adjusting by one][:blackboard :"numeral system"]
[36:47][Performing subtraction with a regular adder][:blackboard :"logic design" :"numeral system"]
[39:24][Shout-out to ~bitwise Day 50 on two's complement and ripple carry adders[ref
site=Twitter
page="Catching up on Bitwise and I want to give a shout-out to Day 50 (Logic Design Part 2), it covers two's complement and ripple carry like RISCY BUSINESS Day 12 and COAD 2.4"
url=https://twitter.com/hmn_riscy/status/1022788067030171649]][:"logic design" :"numeral system" :research]
[43:09][Counting binary representations of negative numbers in two's complement with zeroes][:"numeral system" :research]
[47:50][Chapter 2.4 :Hardware / Software Interface, signed loads[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[50:16][Chapter 2.4 :Hardware / Software Interface, memory addresses starting at 0[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[52:06][Chapter 2.4 :Hardware / Software Interface, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[54:03][Chapter 2.4 Example 2 - Negation Shortcut[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[55:06][Negation by flipping the bits and adding one][:blackboard :"numeral system"]
[56:24][Compare our answer to Chapter 2.4 Example 2 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[57:18][Chapter 2.4 Example 3 - Sign Extension Shortcut[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[58:00][Sign extend 2 and -2 from 4-bits to 8-bits][:blackboard :"numeral system"]
[59:43][Compare our answer to Chapter 2.4 Example 3 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:02:20][Chapter 2.4 Summary[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:02:44][Chapter 2.4 Elaboration, on the unanimity of two's complement for representations of both negative and positive numbers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:03:09][Chapter 2.4 Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:04:25][Chapter 2.4 Check Yourself Answers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:04:46][Chapter 2.4 Elaboration, on the etymology of "two's complement"[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:05:44][Chapter 2.4 continued, on ones' complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:07:42][Biased notation][:blackboard :"numeral system"]
[1:08:31][Chapter 2.4 continued, on biased notation[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:09:09][Chapter 2.4, one's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:09:50][Chapter 2.4, biased notation[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:10:15][Look forward to learning how biased notation ties in to floating point][:"numeral system" :speech]
[1:11:55][That's the end of Chapter 2.4][:speech]
[1:12:44][Determine to do a series of short, prepared educational videos on integers and adders][:"logic design" :"numeral system" :speech]
[1:22:28][Thank you for tuning in and to everyone who supports the series][:speech]
[/video]

190
miotatsu/riscy/book/reader001.hmml
View File

@ -1,190 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="Preface, 1.1-1.3" vod_platform=youtube id=wu1-KpveA1A annotator=Miblo]
[0:11][Introduce the RISC-V Reader[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:speech]
[1:16][The back cover[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[4:15][Pre-preface[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[7:29][@dannyfritz][ped a gah gee]
[7:47][Pre-preface continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[8:00][@dannyfritz][ped a gah jee]
[8:09][Pre-preface continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[10:42][Background from the publisher[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[13:12][Check out the GitHub repository[ref
site=GitHub
page=armandofox/latex2ebook
url=https://github.com/armandofox/latex2ebook]][:research]
[15:06][Dedication[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[18:38][Preface[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[25:23][Plug links.riscy.tv[ref
site="RISCY BUSINESS Forums"
page="Useful Links"
url=http://links.riscy.tv]]
[25:34][Preface continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[26:47][History of this book[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[30:44][Chapter 1 - Why RISC-V?[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[32:16][Chapter 1.1 - Introduction[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[33:29][A few words on deep learning][:speech]
[35:56][Chapter 1.1 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[37:38][Figure 1.1 - Members of the RISC-V foundation[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[41:35][Figure 1.2 - Growth of the x86 instruction set over its lifetime[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[45:06][Figure 1.3 - A description of the x86-32 ASCII adjust after addition instruction[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[47:23][Chapter 1.2 - Modular vs Incremental ISAs[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[51:09][Reflect on the analogy of a meal becoming a banquet to an ISA growing incrementally][:speech]
[51:55][Chapter 1.2 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[56:27][@dannyfritz][SSE SSE2 SSE3]
[57:18][@dannyfritz][Not sure, I feel like SSE3 requires SSE2 and SSE]
[58:47][@dannyfritz][Oh, like ARB in OpenGL. Interesting]
[59:08][Chapter 1.3 - ISA Design 101[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:fabrication :research]
[1:02:37][Figure 1.4 - An 8″ diameter wafer of a RISC-V die designed by SiFive[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:fabrication :research]
[1:04:12][Chapter 1.3 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:fabrication :research]
[1:06:14][Recall Mike Acton's recommendation from HandmadeCon 2015[ref
site="Molly Rocket"
page="HandmadeCon 2015: Mike Acton"
url=https://mollyrocket.com/news_0035.html] to read x86 manuals][:speech]
[1:09:39][@dannyfritz][Does that include docs for extensions?]
[1:10:00][Show the HiFive1 documentation[ref
site="RISCY BUSINESS Forums"
page="Useful Links"
url=http://links.riscy.tv]][:research]
[1:16:02][Compare the quantities of documentation for RISC-V and x86][:speech]
[1:17:35][Chapter 1.3 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[1:20:55][@dannyfritz][Do RISC-V instructions always operate in 1 cycle?[ref
site="SiFive Forums"
url=https://forums.sifive.com/]]
[1:22:52][Chapter 1.3 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[1:23:38][Find the running time equation on the :blackboard]
[1:24:53][Chapter 1.3 continued, on cycles per instruction[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[1:27:23][Reflect on this comparison of instruction count between ARM and the smaller RISC-V][:speech]
[1:30:25][Chapter 1.3 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[1:31:12][Consider that RISC-V instructions may have been designed to have a reliable number of clock cycles][:speech]
[1:31:54][Chapter 1.3 continued, performance comparison[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:research]
[1:33:55][Wrap it up with a glimpse into the future][:speech]
[/video]

109
miotatsu/riscy/book/reader002.hmml
View File

@ -1,109 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="1.3-1.6" vod_platform=youtube id=gPPwNBSwpsM annotator=Miblo]
[0:02][Welcome to the episode][:speech]
[0:27][Chapter 1.3 continued, Isolation of Architecture from Implementation; and Room for Growth[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[7:25][Figure 1.5 - Relative program sizes for RV32G, ARM-32, x86-32, RV32C and Thumb-2[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[20:54][Notes in the margin of p.8 - Pipelining and :ISA complexity[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[22:12][Chapter 1.3 continued, Program Size; and Ease of programming, compiling and linking[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[29:36][Recall @DannyFritz's question as to whether RISC-V instructions always operate in one cycle][:isa :speech]
[32:43][Chapter 1.3 continued, Ease of programming, compiling and linking[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[37:35][Chapter 1.4 - An Overview of this Book[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[39:33][Note that we've seen pseudo-instructions in [~riscy RISCY BUSINESS]][:speech]
[40:30][Chapter 1.4 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[42:31][Glimpse into the future of writing an assembler and compiler, with thoughts on undefined behaviour][:language :rant]
[55:42][Chapter 1.4 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[57:04][Check if Computer Architecture: a Quantitative Approach[ref
title="Computer Architecture: A Quantitative Approach"
author="John Hennessy & David Patterson"
publisher="Morgan Kaufmann"
isbn=9780123838728
url=https://www.elsevier.com/books/computer-architecture/hennessy/978-0-12-383872-8] contains a green card]
[58:43][Chapter 1.4 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[59:34][Recall a conversation with Andrew and Yunsup about vector machines][:speech]
[1:01:40][Chapter 1.4 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:03:33][Chapter 1.5 - Concluding Remarks[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:05:37][Figure 1.6 - Number of pages and words of :ISA manuals[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:13:04][Chapter 1.5 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:16:35][Thoughts on the monumental task of reading the x86-32 documentation, and Mike Acton's recommendation to do this][:isa :speech]
[1:19:12][Chapter 1.5 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:25:17][Chapter 1.6 - To Learn More[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:30:31][Wind it down][:speech]
[1:31:31][Address Patreon's proposed fee changes from Winter 2017, with a plug of the pledge platform poll[ref
site=Twitter
page="Poll: What is your preferred platform to support creators online? I want to provide an alternative to Patreon for those unhappy with the recent changes they've made to their payment structure"
url=https://twitter.com/hmn_riscy/status/940262754639925250] and thanks for the support][:speech]
[/video]

119
miotatsu/riscy/book/reader003.hmml
View File

@ -1,119 +0,0 @@
[video member=miotatsu stream_platform=twitch project=book title="2.1-2.3" vod_platform=youtube id=Tfv34rzvftM annotator=Miblo]
[0:01][Welcome to the stream][:speech]
[0:31][Chapter 2 - RV32I: RISC-V Base Integer :ISA[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]]
[1:29][Chapter 2.1 - Introduction[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[2:30][Map the tablet][:admin]
[3:02][The set notation used in the book to describe the :ISA][:blackboard]
[7:24][Chapter 2.1 continued[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[7:38][Chapter 2.2 - RV32I Instruction Formats[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[11:31][Figure 2.1 - Diagram of the RV32I instructions[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[18:06][Diagram of the RV32I instructions][:blackboard :isa]
[30:54][Figure 2.2 - RISC-V instruction formats[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[34:10][Add B-type to our RISC-V instruction formats diagram][:blackboard :isa]
[37:43][Explain the RISC-V instruction formats diagram][:blackboard :isa]
[40:09][Add J-type to our RISC-V instruction formats diagram][:blackboard :isa]
[42:25][Explain immediates and their encoding][:isa :speech]
[43:21][Figure 2.3 - RV32I opcode map[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[45:43][Search the annotated episode guide for "instruction encoding"[ref
site="RISCY BUSINESS"
page="Annotated Episode Guide"
url=http://cinera.riscy.tv#instruction%20encoding]][:isa]
[48:25][Figure 2.3 continued, with thoughts on funct3[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[49:41][@snail7777777][Hey, bud]
[49:44][Continued thoughts on funct3[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[51:03][Chapter 2.2 continued, Elaboration: B- and J-type formats[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[52:47][Chapter 2.2 continued, Aside: Sign-extended immediates even help logical instructions[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[54:03][Chapter 2.2 continued, illegal instructions and leaving room for extensions[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[56:46][Thoughts on the carefully arranged immediates][:isa :speech]
[58:48][Chapter 2.2 continued, enabling :hardware simplicity[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[1:00:11][Chapter 2.2 continued, Aside: RISC-V implementations all use the same opcode for the optional extensions[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[1:00:39][Chapter 2.2 continued, the ARM-32 12-bit immediate field[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[1:02:41][Chapter 2.2 continued, Elaboration: Out-of-order processors[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[1:03:39][Chapter 2.3 - RV32I Registers[ref
title="RISC-V Reader"
author="David Patterson and Andrew Waterman"
publisher="Strawberry Canyon"
isbn=9780999249116
url=http://www.riscvbook.com/]][:isa]
[1:06:10][Wrap it up with the determination continue this another day][:speech]
[/video]