Annotate riscy/book/coad016

riscy/book/coad015: Fix typos
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Matt Mascarenhas 2018-05-31 23:02:29 +01:00
parent f148317548
commit 241b0b6746
2 changed files with 184 additions and 6 deletions

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@ -41,16 +41,16 @@
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :hardware]
[56:29][Our answer to Chapter 2.1 Example 2][:asm :blackboard :hardware]
[56:29][Our answer to Chapter 2.3 Example 2][:asm :blackboard :hardware]
[1:00:32][Setup the tablet][:admin]
[1:01:51][Putting variables into RISC-V registers][:blackboard :hardware]
[1:04:03][Compare our answer to Chapter 2.1 Example 1 with the book[ref
[1:04:03][Compare our answer to Chapter 2.3 Example 1 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :hardware]
[1:07:37][Chapter 2.1 continued, :Memory Operands[ref
[1:07:37][Chapter 2.3 continued, :Memory Operands[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
@ -62,7 +62,7 @@
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:blackboard :hardware]
[1:15:26][Chapter 2.1 continued[ref
[1:15:26][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
@ -75,14 +75,14 @@
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:hardware]
[1:16:51][Compiling g = h + A\[8\];][:asm :blackboard :memory]
[1:24:56][Compare our answer to Chapter 2.1 Example 2 with the book[ref
[1:24:56][Compare our answer to Chapter 2.3 Example 2 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:25:32][Update our answer to use x22 as the base address][:blackboard :asm :memory]
[1:26:19][Continue to compare our answer to Chapter 2.1 Example 2[ref
[1:26:19][Continue to compare our answer to Chapter 2.3 Example 2[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"

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@ -0,0 +1,178 @@
[video member=miotatsu stream_platform=twitch project=book title="2.3 cont." vod_platform=youtube id=blaDJl-sHgY annotator=Miblo]
[0:08][Recap and set the stage for the day with a mention of the addition of \@naked to hula[ref
site=GitHub
page="riscy-business/hula"
url=https://github.com/riscy-business/hula]][:language]
[3:56][Review the addition of "register" to hula[ref
site=GitHub
page="riscy-business/hula"
url=https://github.com/riscy-business/hula]][:language]
[6:11][Show off the hula hello.S :asm[ref
site=GitHub
page="riscy-business/hula/blog/master/hello.S"
url=https://github.com/riscy-business/hula/blob/master/hello.S]][:language]
[12:15][@riskyfive][By the way, about porting D to RISC-V. I'm stalled on a GCC bug. Exception support in GCC / glibc has a bug, but people from SiFive are working on it][:language]
[12:49][Thoughts on writing :asm and architectural and general portability[ref
site=GitHub
page="riscy-business/hula/blog/master/hello.S"
url=https://github.com/riscy-business/hula/blob/master/hello.S]][:language :speech]
[15:43][Jump into the book][:speech]
[16:50][Compiling an Assignment When an Operand Is in :Memory[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :blackboard]
[19:25][Our answer to Chapter 2.3 'Compiling an Assignment When an Operand Is in :Memory'[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :blackboard]
[20:33][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[23:09][Figure 2.3 Actual RISC-V :memory addresses and contents of memory for those doublewords][:blackboard]
[23:54][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[24:30][Endianness, with a fun fact: It's a reference to Gulliver's Travels][:language :speech]
[25:56][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[26:39][@riskyfive][We should write things on paper little endian style][:language]
[27:07][Thoughts on "endianness" in RTL vs LTR languages][:language :speech]
[29:20][@riskyfive][Yes, yes, that's the reasoning that'll eventually convince you that we should change to little endian on paper. Let the endianness flow through you. Come to the little side of the force][:language]
[29:48][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[31:21][Thoughts on :asm syntax, with a mention of [@pervognsen Per]'s chosen syntax for his assembler][:blackboard :language]
[34:52][Chapter 2.3 continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[37:12][Thoughts on alignment of :memory accesses][:speech]
[38:35][@riskyfive][Got to go. Good night!]
[38:44][On RISC-V's ability to do unaligned :memory accesses][:speech]
[39:54][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[40:35][Thoughts on the marketing of hard drive and :memory capacities, and confusion of units][:speech]
[44:50][Chapter 2.3 Example 3 - Compiling Using Load and Store[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[45:26][A\[12\] = h + A\[8\];][:asm :blackboard :memory]
[53:24][Compare our answer to Chapter 2.3 Example 3 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
[55:33][Thoughts on calling conventions][:asm :language :speech]
[1:01:27][Continue to compare our answer to Chapter 2.3 Example 3 with the book,[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4] with thoughts on destructive operations][:asm]
[1:09:01][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:09:21][The stack][:memory :speech]
[1:13:18][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:13:45][Using saved registers and temporaries, and the concept of spilling to the stack][:memory :speech]
[1:16:39][Chapter 2.3 continued, :Hardware / Software Interface[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:18:08][Chapter 2.3 Elaboration[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :memory]
[1:18:48][Hierarchy of Caches][:memory :speech]
[1:22:09][Chapter 2.3 - Constant or Immediate Operands[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:25:24][Chapter 2.3 - Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:26:29][Virtual vs actual registers][:isa :memory :speech]
[1:29:39][Our answer to Chapter 2.3 - Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:30:58][Chapter 2.3 Check Yourself Answer[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:32:35][Chapter 2.3 Elaborations on registers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:36:32][C type widths, and data models[ref
site="IBM Knowledge Center"
page="ILP32 and LP64 data models and data type sizes"
url=https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.cbcpx01/datatypesize64.htm]][:language :speech]
[1:41:24][Show type-width handling in nwr_mem.h][:memory]
[1:46:45][Chapter 2.3 Elaborations on registers, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:49:03][Show size_t use in pcalc's linux_x86_64.c][:memory]
[1:51:14][Chapter 2.3 Elaborations on registers, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :memory]
[1:52:19][That is the end of 2.3, with a glimpse into the next chapter][:speech]
[1:53:52][Considering the benefits of C over assembly: portability, automatic handling of calling conventions, and…][:asm :speech]
[1:57:57][The other major benefit of C over assembly, along with portability, is that it is a structured :language][:asm :speech]
[2:06:49][End the episode, with shout-outs to new supporters][:speech]
[/video]