From 6914ae3e99b01fed472538284f39b2180fd4bd29 Mon Sep 17 00:00:00 2001 From: Matt Mascarenhas Date: Fri, 22 Dec 2017 23:42:49 +0000 Subject: [PATCH] Annotate riscy055 --- miotatsu/riscy/riscy/riscy055.hmml | 93 ++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 miotatsu/riscy/riscy/riscy055.hmml diff --git a/miotatsu/riscy/riscy/riscy055.hmml b/miotatsu/riscy/riscy/riscy055.hmml new file mode 100644 index 0000000..a0b4dc2 --- /dev/null +++ b/miotatsu/riscy/riscy/riscy055.hmml @@ -0,0 +1,93 @@ +[video member=miotatsu stream_platform=twitch project=riscy title="Studying Calling Conventions" vod_platform=youtube id=WojkdLsbgvc annotator=Miblo] +[0:07][Recap and set the stage for the day][:speech] +[1:04][Make pwm_speed_test to see multiple definitions of handle_trap() due to init.c being included] +[4:11][Ponder modifying common.mk to avoid including init.c twice][:research] +[7:15][Note that the trap handler is responsible for handling unimplemented instructions][:speech] +[8:58][Read use_pll() in init.c][:research] +[11:13][Stop passing -DNO_INIT in the Makefile and remove _putc() and _puts() from pwm_speed_test.c] +[12:20][Rename handle_trap() to handle_m_ext_interrupt() and let init.c setup the trap handler for us] +[15:04][Consult the other demos in the Freedom E SDK for printf and write][:research] +[18:07][#include stdio.h and make pwm_0_handler() call printf()] +[19:18][Comment out all the headers, build and readd them until we have no compile errors] +[21:36][Make and successfully upload to the HiFive1] +[22:09][@croepha][Hello] +[22:14][Reset the HiFive1 and see a "Hello, World!" before it terminates][:run] +[23:01][@croepha][Oooh, are we uploading to the HiFive1?] +[23:06][Temporarily comment out everything before the printf(), build and upload it] +[24:26][:Run the program to see that it terminates before printing] +[24:49][Comment out the :asm volatile ("wfi") and consult the other demos for alternate ways to infinite loop][:research] +[29:31][Build and upload pwm_speed_test] +[29:56][:Run and see the same behaviour] +[30:03][Try putting the printf() within the infinite loop, build and upload] +[30:32][:Run and see the same behaviour] +[30:55][Try to upload led_fade to the HiFive1] +[32:01][Consult the Getting Started Guide[ref + site="SiFive Developers" + page="HiFive1 Getting Started Guide" + url=https://dev.sifive.com/hifive1/hifive1-getting-started-guide/] and the Forums[ref + site="SiFive Forums" + page="What are you building with yours?" + url=https://forums.sifive.com/t/what-are-you-building-with-yours/209/5] for the correct make clean invocation][:research] +[34:45][@croepha][Backups man, backups] +[35:09][Consider reading documentation][:speech] +[35:41][@croepha][I highly recommend doing an automated full system backup][quote 18] +[36:05][Scan through the documentation for topics to learn][:research] +[38:29][Jump to Chapter 8 - Debug[ref + site="SiFive Developers" + page="Freedom E310-G000 Manual" + url=https://www.sifive.com/documentation/chips/freedom-e310-g000-manual/]][:research] +[39:10][@croepha][By the way, I think I read somewhere that there is already GDB support for RISC-V] +[39:38][Read Chapter 1.4 - Debug Mode[ref + site="RISC-V" + page="Draft Privileged ISA Specification v1.9.1" + url=https://riscv.org/specifications/privileged-isa/]][:research] +[42:43][@croepha][Do you have a JTAG cable?] +[43:05][Scan the Getting Started Guide for debug information[ref + site="SiFive Developers" + page="HiFive1 Getting Started Guide" + url=https://dev.sifive.com/hifive1/hifive1-getting-started-guide/] and discover "make run_debug"][:research] +[45:35][Read Chapter 3.2.2 - Wait for Interrupt[ref + site="RISC-V" + page="Draft Privileged ISA Specification v1.9.1" + url=https://riscv.org/specifications/privileged-isa/]][:research] +[51:24][Read Chapter 20 - Calling Convention[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[52:05][Read Chapter 20.1 - C Datatypes and Alignment[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[54:01][Show how nwr_mem.h determines the integer model][:research] +[55:07][Chapter 20.1 continued[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[57:01][Read Chapter 20.2 - RVG Calling Convention[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[59:55][Reflect on RISC-V's handling of a 64-bit value on a 32-bit machine][:speech] +[1:01:16][Chapter 20.2 continued[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[1:02:45][Note a good rule of thumb: in RISC-V, arguments more than twice the size of a pointer get passed by reference][:speech] +[1:03:38][Chapter 20.2 continued[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[1:08:04][Consult Table 20.2: RISC-V calling convention register usage[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[1:10:22][Read Chapter 20.3 - Soft-Float Calling Convention[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[1:14:29][Read Chapter 20.4 - RV32E Calling Convention[ref + site=RISC-V + page="User-Level ISA Specification v2.1" + url=https://riscv.org/specifications]][:research] +[1:15:01][That ends that][:speech] +[/video]