Annotate riscy/coad019
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[video member=miotatsu stream_platform=twitch project=book title="2.5" vod_platform=youtube id=dcSLXDB766U annotator=Miblo]
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[0:08][Set the stage for our continuation of the book]
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[1:00][Chapter 2.5 Representing instructions in the Computer[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[1:58][Chapter 2.5 Example 1 - Translating a RISC-V Assembly Instruction into a Machine Instruction[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[3:11][The decimal representation of RISC-V :asm `add x9, x20, x21`][:blackboard :isa]
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[5:29][Chapter 2.5 Example 1 continued[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[7:34][RISC-V Instruction Encoding][:blackboard :isa]
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[10:03][The binary representation of RISC-V :asm `add x9, x20, x21`][:blackboard :isa]
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[13:05][Chapter 2.5 continued, on the instruction format[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[13:32][A few words on RISC-V's compressed extension][:isa :speech]
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[17:20][Chapter 2.5 continued, machine language and machine code[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[17:30][Distinguishing between assembly and machine code][:isa :language :speech]
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[19:50][Chapter 2.5 continued, hexadecimal-to-binary conversion[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[21:47][Hexadecimal][:blackboard :"numeral system"]
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[29:12][@croepha][Hello]
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[29:15][Binary to hexadecimal][:blackboard :"numeral system"]
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[34:40][@croepha][Unrelated: I am of the opinion that humans should have adopted the dozenal (base 12) system instead of base 10][:"numeral system"]
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[36:02][Hexadecimal to decimal conversion][:blackboard :"numeral system"]
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[37:22][@croepha][Yeah you can count to 12 on one hand using knuckles and your thumb to point][:"numeral system"]
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[39:47][Figure 2.4 - The hexadecimal–binary conversion table[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
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[42:09][Chapter 2.5 continued, subscripting the :"numeral system"[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]]
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[43:46][Chapter 2.5 Example 2 - Binary to Hexadecimal and Back[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
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[44:52][Converting 0xECA86420 to binary][:blackboard :"numeral system"]
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[47:46][@croepha][Later, take care]
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[47:54][Converting 0001 0011 0101 0111 1001 1011 1101 1111 to hexadecimal][:blackboard :"numeral system"]
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[51:34][Compare our answer to Chapter 2.5 Example 2 with the book[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
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[53:33][Recommend memorising hexadecimal–binary pairings][:"numeral system" :speech]
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[55:55][Chapter 2.5 continued, RISC-V Fields[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[58:38][Note that the J-type instructions may no longer exist][:isa :speech]
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[1:00:35][Chapter 2.5 continued, instruction formats[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[1:05:14][Design Principle 3: "Good design demands compromises"][:performance :speech]
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[1:08:58][Design Principle 2: "Smaller is faster"][:performance :speech]
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[1:14:42][Design Principle 1: "Simplicity favours regularity"][:performance :speech]
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[1:16:30][Shout-out to RAD Game Tools' employee @Mr4thDimention and the quality of his editor ~4coder][:speech]
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[1:20:20][Chapter 2.5 continued, the compromises chosen by the RISC-V designers[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[1:24:14][The load register instruction from page 71[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4][ref
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site="Book Club / Computer Organization and Design: 2.3 cont."
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page="Chapter 2.3 Example 3 - Compiling Using Load and Store"
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url=https://riscy.handmade.network/episode/coad/coad016/#2690]][:isa]
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[1:28:56][Figure 2.5 - RISC-V instruction encoding[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[1:32:46][Point out the versatility of the opcodes in RISC-V][:isa :speech]
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[1:34:57][Figure 2.5 continued[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:isa]
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[1:36:23][A few more words on the versatility and unsimplicity of opcodes][:isa :speech]
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[1:38:22][Chapter 2.5 Example 3 - Translating RISC-V Assembly :Language into Machine Language[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm]
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[1:39:22][Lowering from C to assembly: `A\[30\] = h + A\[30\] + 1;`[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4][ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:asm :blackboard :language]
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[1:50:45][Translating our assembly to machine code[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4][ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:asm :blackboard :isa :language]
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[2:23:25][Thoughts on viewing RISC-V instructions][:isa :language :speech]
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[2:31:48][Continue translating our assembly to machine code[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:asm :blackboard :isa :language]
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[2:44:17][Compare our answer to Chapter 2.5 Example 3 with the book[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:09:26][A few words on the greater potential for errors in handwritten machine code than C]
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[3:14:01][Chapter 2.5 Elaborations, on immediate instructions[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:15:11][Chapter 2.5 Hardware / Software Interface[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:15:40][Figure 2.6 - RISC-V architecture revealed through Section 2.5[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:18:30][Chapter 2.5 The Big Picture[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:19:58][Figure 2.7 The stored-program concept[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language :memory]
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[3:21:24][Chapter 2.5 Check Yourself[ref
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title="Computer Organization and Design RISC-V Edition"
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author="David Patterson & John Hennessy"
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publisher="Morgan Kaufmann"
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isbn=9780128122754
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url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:asm :isa :language]
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[3:24:41][That ends section 2.5][:speech]
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[/video]
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[video member=miotatsu stream_platform=twitch project=riscy title="RISC-V PC Planning" vod_platform=youtube id=nKfandgaA6Q annotator=]
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[/video]
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