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Fix out-of-order annotations in riscy006 and 043

This commit is contained in:
Matt Mascarenhas 2018-04-01 22:35:58 +01:00
parent 44c79683b7
commit beed82adc9
2 changed files with 2 additions and 2 deletions
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2
miotatsu/riscy/riscy/riscy006.hmml
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@ -15,8 +15,8 @@
page="Draft Privileged ISA Specification v1.9.1"
url=https://riscv.org/specifications/privileged-isa/]][:research :hardware]
[6:55][Summarise this paragraph][:research :hardware]
[13:41][Note that there are a number of registers relating to interrupt sources, all starting with an "m", with a few words on information seeping in][:hardware]
[10:54][:Research Local interrupt sources][:hardware]
[13:41][Note that there are a number of registers relating to interrupt sources, all starting with an "m", with a few words on information seeping in][:hardware]
[15:09][:Research Global interrupt sources][:hardware]
[16:25][:Research Interrupt Targets and Hart Contexts][:hardware]
[20:18][:Research Controlling Access to the PLIC and PLIC Core Specification][:hardware]

2
miotatsu/riscy/riscy/riscy043.hmml
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@ -38,8 +38,8 @@
url=https://github.com/sifive/freedom-e-sdk] and determine to ask on the forums]
[42:10][Review the PWM Red LED path][:peripheral :research]
[45:22][Review the LED code in led_fade.c][:peripheral :research]
[45:58][Duty cycle][:blackboard :peripheral]
[45:47][@croepha][Period != duty cycle. Period is more like frequency]
[45:58][Duty cycle][:blackboard :peripheral]
[48:42][Review the documentation on CMP0[ref
site="SiFive Developers"
page="Freedom E300 Platform Reference Manual"