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[video member=miotatsu stream_platform=twitch project=book title="2.4 cont." vod_platform=youtube id=xEiIELp5E6Y annotator=Miblo]
[0:00][Welcome to the stream][:speech]
[0:22][Set up to clarify the explanation of two's complement from last time, with a mention of Plato's Theory of Forms[ref
site=Wikipedia
page="Theory of forms"
url=https://en.wikipedia.org/wiki/Theory_of_forms]][:blackboard :"numeral system"]
[4:14][Representations of negative numbers][:blackboard :"numeral system"]
[7:17][Mapping an entire signed nibble between -8 and 7 to the range 0–F][:blackboard :"numeral system"]
[12:59][Assigning the high bit of each value to be the sign bit][:blackboard :"numeral system"]
[17:37][Assigning the low bit of each value to be the sign bit (interleaved positive and negative)][:blackboard :"numeral system"]
[21:26][Two's complement, as a shifted mapping from -8 to 7, i.e. from 0 to 7, then -8 to -1][:blackboard :"numeral system"]
[25:57][Ones' complement, as a perfectly mirrored representation][:blackboard :"numeral system"]
[29:01][Intuitively understanding two's complement by flipping and adjusting by one][:blackboard :"numeral system"]
[36:47][Performing subtraction with a regular adder][:blackboard :"logic design" :"numeral system"]
[39:24][Shout-out to ~bitwise Day 50 on two's complement and ripple carry adders[ref
site=Twitter
page="Catching up on Bitwise and I want to give a shout-out to Day 50 (Logic Design Part 2), it covers two's complement and ripple carry like RISCY BUSINESS Day 12 and COAD 2.4"
url=https://twitter.com/hmn_riscy/status/1022788067030171649]][:"logic design" :"numeral system" :research]
[43:09][Counting binary representations of negative numbers in two's complement with zeroes][:"numeral system" :research]
[47:50][Chapter 2.4 :Hardware / Software Interface, signed loads[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[50:16][Chapter 2.4 :Hardware / Software Interface, memory addresses starting at 0[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[52:06][Chapter 2.4 :Hardware / Software Interface, continued[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[54:03][Chapter 2.4 Example 2 - Negation Shortcut[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[55:06][Negation by flipping the bits and adding one][:blackboard :"numeral system"]
[56:24][Compare our answer to Chapter 2.4 Example 2 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[57:18][Chapter 2.4 Example 3 - Sign Extension Shortcut[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[58:00][Sign extend 2 and -2 from 4-bits to 8-bits][:blackboard :"numeral system"]
[59:43][Compare our answer to Chapter 2.4 Example 3 with the book[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:02:20][Chapter 2.4 Summary[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:02:44][Chapter 2.4 Elaboration, on the unanimity of two's complement for representations of both negative and positive numbers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:03:09][Chapter 2.4 Check Yourself[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:04:25][Chapter 2.4 Check Yourself Answers[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:04:46][Chapter 2.4 Elaboration, on the etymology of "two's complement"[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:05:44][Chapter 2.4 continued, on ones' complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:07:42][Biased notation][:blackboard :"numeral system"]
[1:08:31][Chapter 2.4 continued, on biased notation[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:09:09][Chapter 2.4, one's complement[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:09:50][Chapter 2.4, biased notation[ref
title="Computer Organization and Design RISC-V Edition"
author="David Patterson & John Hennessy"
publisher="Morgan Kaufmann"
isbn=9780128122754
url=https://www.elsevier.com/books/computer-organization-and-design-risc-v-edition/patterson/978-0-12-812275-4]][:"numeral system"]
[1:10:15][Look forward to learning how biased notation ties in to floating point][:"numeral system" :speech]
[1:11:55][That's the end of Chapter 2.4][:speech]
[1:12:44][Determine to do a series of short, prepared educational videos on integers and adders][:"logic design" :"numeral system" :speech]
[1:22:28][Thank you for tuning in and to everyone who supports the series][:speech]
[/video]