[video member=miotatsu stream_platform=twitch project=riscy title="PRCI" vod_platform=youtube id=lCDsMmd5Jtw annotator=Miblo]
[0:07][Recap and set the stage for the day]
[0:45][Read about E300 Power, Reset, Clock, Interrupt (PRCI) Control and Status Registers[ref
        site="SiFive Developers"
        page="E3 Coreplex Manual"
        url=https://static.dev.sifive.com/pdfjs/web/viewer.html?file=https://static.dev.sifive.com/SiFive-E3-Coreplex-v1.2.pdf]][:hardware :research]
[2:57][Marry up the PRCI_REG macro and the PRCI register offsets from the code with the documentation[ref
        site="SiFive Developers"
        page="E3 Coreplex Manual"
        url=https://static.dev.sifive.com/pdfjs/web/viewer.html?file=https://static.dev.sifive.com/SiFive-E3-Coreplex-v1.2.pdf]][:hardware :research]
[5:22][Hunt for further documentation on the PRCI]
[9:01][Read about E300 Clock Generation[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[14:04][A few thoughts on ring oscillator and trim][:hardware]
[15:36][@riskyfive][Just a chain of not gates]
[15:40][Continued thoughts on how the trim value works][:hardware]
[16:35][Continue reading about the Internal Trimmable Programmable 72 MHz Oscillator (HFROSC)[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[20:29][Read about External 16 MHz Crystal Oscilllator (HFXOSC)[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[22:35][@riskyfive][ESR: equivalent series resistance]
[22:47][Continue reading about the HFXOSC[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[23:31][@riskyfive][Voltage-controlled oscillator]
[23:40][Continue reading about HFXOSC[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[24:47][Read about Internal High-Frequency PLL (HFPLL)[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/] and Phase-locked loop[ref
        site=Wikipedia
        page="Phase-locked loop"
        url=https://en.wikipedia.org/wiki/Phase-locked_loop]][:hardware :research]
[27:59][Determine to add to the plan][:blackboard]
[30:17][@riskyfive][i.e. an assembler ;)]
[30:31][Add "compare a demo's asm to expected", "study the hardware implementation" and "write software" to the plan][:blackboard]
[31:52][Continue reading about HFPLL[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[35:18][A few thoughts on how the PLL relates to the marketed clock rate of the HiFive1][:blackboard]
[37:04][@riskyfive][The PPL generates the higher clock rates from the crystal]
[37:59][@riskyfive][Probably not within spec]
[38:25][Consider overclocking a HiFive1 (not our main one, though!)]
[39:20][Continue reading about HFPLL[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[42:23][@riskyfive][When they say 0 is not supported I'm imagining it's because the core doesn't run that quickly, not because that divider wouldn't work]
[43:18][Continue reading about HFPLL[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[49:49][Read about PLL]
[49:54][@riskyfive][VDD and VSS are power pins]
[50:00][Read about PLL Output Divider[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[51:15][Read about Internal Low-Frequency Oscillator (LFRCOSC)[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[51:55][Read about External 32.768 kHz Low-Frequency Crystal Oscillator (LFXOSC)[ref
        site="SiFive Developers"
        page="Platform Reference Manual"
        url=https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/]][:hardware :research]
[52:39][Determine that we fully understand the opening code of led_fade.c and consult the PLL_* macros]
[55:19][Cross off "PRCI" and move on to "Other Demos"][:blackboard]
[56:34][Embark on studying performance_counters.c][:performance :research]
[1:00:34][Read 3.1.15 :Hardware :Performance Monitor[ref
    site="RISC-V"
    page="Draft Privileged ISA Specification v1.9.1"
    url=https://riscv.org/specifications/privileged-isa/]]
[1:03:34][Continue reading the rdmcycle() macro][:asm :performance :research]
[1:04:29][Read about BNE in 2.5 Control Transfer Instructions and CSRRS in 2.8 Control and Status Register Instructions[ref
    site=RISC-V
    page="User-Level ISA Specification v2.1"
    url=https://riscv.org/specifications]][:performance :research]
[1:09:50][Summarise how rdmcycle() is checking for rollover into the high half of the register][:asm :performance]
[1:10:53][@riskyfive][Not rollover completely, only increment in the part of mcycleh]
[1:11:32][Wonder if the 1b in rdmcycle() means 1 in binary][:asm]
[1:12:26][We are out of time for today]
[1:12:39][@riskyfive][Skip over what?]
[1:13:39][Determine to investigate deeper in the next episode]
[/video]