[video member=miotatsu stream_platform=twitch project=book title="2.6" vod_platform=youtube id=2MuDCs3ZX-Y annotator=Miblo]
[0:02][Welcome to the stream][:speech]
[0:54][Recap the XOR tricks from last time and set the stage for the day][:mathematics :speech]
[3:39][Chapter 2.6 - RV32I Conditional Branch[ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:isa]
[7:50][Definition: bltu (for signed array bounds-checking)[ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:isa]
[9:46][Chapter 2.6 continued, What's Different in conditional branching between RISC-V and other architectures[ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:isa]
[10:53][Chapter 2.6 Elaboration 1 - Multiword addition without condition codes[ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:isa :mathematics]
[13:37][Hunt for multibyte addition example in Code: The Hidden Language of Computer Hardware and Software[ref
    title="Code: The Hidden Language of Computer Hardware and Software"
    author="Charles Petzold"
    publisher="Microsoft Press"
    isbn=0-7356-0505-X
    url=http://www.charlespetzold.com/code/]][:isa :mathematics]
[17:22][Chapter 19 - Two Classic Microprocessors[ref
    title="Code: The Hidden Language of Computer Hardware and Software"
    author="Charles Petzold"
    publisher="Microsoft Press"
    isbn=0-7356-0505-X
    url=http://www.charlespetzold.com/code/]][:isa :mathematics]
[25:48][Chapter 19 continued, on the ADC (addition with carry) and SBB (subtraction with borrow) instructions in the Intel 8080 microprocessor[ref
    title="Code: The Hidden Language of Computer Hardware and Software"
    author="Charles Petzold"
    publisher="Microsoft Press"
    isbn=0-7356-0505-X
    url=http://www.charlespetzold.com/code/]][:blackboard :isa :mathematics :research]
[36:50][Imaginary RISC-V multibyte addition with carry][:blackboard :isa :mathematics]
[39:03][Chapter 19 continued, on the ADD, ADC pattern[ref
    title="Code: The Hidden Language of Computer Hardware and Software"
    author="Charles Petzold"
    publisher="Microsoft Press"
    isbn=0-7356-0505-X
    url=http://www.charlespetzold.com/code/]][:isa :mathematics :research]
[39:32][Chapter 19 continued, on the 8080 flags: Carry, Zero, Sign, Parity and Auxiliary Carry[ref
    title="Code: The Hidden Language of Computer Hardware and Software"
    author="Charles Petzold"
    publisher="Microsoft Press"
    isbn=0-7356-0505-X
    url=http://www.charlespetzold.com/code/]][:isa :research]
[41:41][Thoughts on the differing complexity and terseness of architectures with (8080) and without (RISC-V) status flags][:blackboard :isa]
[45:26][Chapter 2.6 Elaboration 1 - Multiword addition without condition codes[ref
    title="RISC-V Reader"
    author="David Patterson and Andrew Waterman"
    publisher="Strawberry Canyon"
    isbn=9780999249116
    url=http://www.riscvbook.com/]][:blackboard :isa :mathematics :research]
[55:12][Wrap this up][:speech]
[56:05][@krish2nasa][Thanks]
[/video]