34 lines
1.8 KiB
Plaintext
34 lines
1.8 KiB
Plaintext
[video member=miotatsu stream_platform=twitch project=riscy title="Understanding read_csr(mhartid)" vod_platform=youtube id=C0A-EQuQP0U annotator=Miblo]
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[0:06][Set the stage for the day]
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[0:42][Read through plic.h]
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[2:21][Read through encoding.h, where we find read_csr()]
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[6:33][Read freedom-e300-hifive1/platform.h]
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[8:07][Consult the manual: Memory Map, and Interrupts[ref
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site="SiFive Developers"
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page="Freedom E310-G000 Manual"
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url=https://www.sifive.com/documentation/chips/freedom-e310-g000-manual/]][:research]
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[11:59][Continue reading plic_driver.c with a view to understanding read_csr(mhartid)]
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[13:17][Consult the User-Level spec on CSR instructions[ref
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site="RISC-V"
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page="User-Level ISA Specification v2.1"
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url=https://riscv.org/specifications/]][:asm :research]
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[19:05][Atomic Read and Set Bits in CSR][:blackboard :asm]
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[26:50][Consult the Privileged ISA Spec on CSR [ref
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site="RISC-V"
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page="Draft Privileged ISA Specification v1.9.1"
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url=https://riscv.org/specifications/privileged-isa/]][:asm :research]
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[30:30][Begin to understand the csrr instruction, aided by the table of CSR addresses][:research :asm]
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[34:34][Learn that mhartid is the "Hardware thread ID"][:research :asm]
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[39:56][Read about the Machine-Level ISA[ref
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site="RISC-V"
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page="Draft Privileged ISA Specification v1.9.1"
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url=https://riscv.org/specifications/]][:asm :hardware :research]
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[45:25][@insofaras][I think the %0 refers to the _tmp variable]
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[45:59][@insofaras][The GCC inline :asm syntax is pretty weird]
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[46:56][Summarise what read_csr(mhartid) is doing]
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[47:33][Move on to the next line of code]
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[50:20][The parameters that csrr takes, and what read_csr() and mhartid are][:blackboard]
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[53:47][Discover what _AC() and PLIC_ENABLE_OFFSET() are]
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[56:51][Determine to consult the spec tomorrow]
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[/video]
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