69 lines
3.4 KiB
Plaintext
69 lines
3.4 KiB
Plaintext
[video member=miotatsu stream_platform=twitch project=book title="2.6" vod_platform=youtube id=2MuDCs3ZX-Y annotator=Miblo]
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[0:02][Welcome to the stream][:speech]
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[0:54][Recap the XOR tricks from last time and set the stage for the day][:mathematics :speech]
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[3:39][Chapter 2.6 - RV32I Conditional Branch[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:isa]
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[7:50][Definition: bltu (for signed array bounds-checking)[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:isa]
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[9:46][Chapter 2.6 continued, What's Different in conditional branching between RISC-V and other architectures[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:isa]
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[10:53][Chapter 2.6 Elaboration 1 - Multiword addition without condition codes[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:isa :mathematics]
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[13:37][Hunt for multibyte addition example in Code: The Hidden Language of Computer Hardware and Software[ref
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title="Code: The Hidden Language of Computer Hardware and Software"
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author="Charles Petzold"
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publisher="Microsoft Press"
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isbn=0-7356-0505-X
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url=http://www.charlespetzold.com/code/]][:isa :mathematics]
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[17:22][Chapter 19 - Two Classic Microprocessors[ref
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title="Code: The Hidden Language of Computer Hardware and Software"
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author="Charles Petzold"
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publisher="Microsoft Press"
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isbn=0-7356-0505-X
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url=http://www.charlespetzold.com/code/]][:isa :mathematics]
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[25:48][Chapter 19 continued, on the ADC (addition with carry) and SBB (subtraction with borrow) instructions in the Intel 8080 microprocessor[ref
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title="Code: The Hidden Language of Computer Hardware and Software"
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author="Charles Petzold"
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publisher="Microsoft Press"
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isbn=0-7356-0505-X
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url=http://www.charlespetzold.com/code/]][:blackboard :isa :mathematics :research]
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[36:50][Imaginary RISC-V multibyte addition with carry][:blackboard :isa :mathematics]
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[39:03][Chapter 19 continued, on the ADD, ADC pattern[ref
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title="Code: The Hidden Language of Computer Hardware and Software"
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author="Charles Petzold"
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publisher="Microsoft Press"
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isbn=0-7356-0505-X
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url=http://www.charlespetzold.com/code/]][:isa :mathematics :research]
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[39:32][Chapter 19 continued, on the 8080 flags: Carry, Zero, Sign, Parity and Auxiliary Carry[ref
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title="Code: The Hidden Language of Computer Hardware and Software"
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author="Charles Petzold"
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publisher="Microsoft Press"
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isbn=0-7356-0505-X
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url=http://www.charlespetzold.com/code/]][:isa :research]
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[41:41][Thoughts on the differing complexity and terseness of architectures with (8080) and without (RISC-V) status flags][:blackboard :isa]
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[45:26][Chapter 2.6 Elaboration 1 - Multiword addition without condition codes[ref
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title="RISC-V Reader"
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author="David Patterson and Andrew Waterman"
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publisher="Strawberry Canyon"
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isbn=9780999249116
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url=http://www.riscvbook.com/]][:blackboard :isa :mathematics :research]
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[55:12][Wrap this up][:speech]
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[56:05][@krish2nasa][Thanks]
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[/video]
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